4

Application Information

Closed Loop Gain Selection

The HFA1114 features a novel design which allows the user

to select from three closed loop gains, without any external

components. The result is a more flexible product, fewer part

types in inventory, and more efficient use of board space.

This “buffer” operates in closed loop gains of -1, +1, or +2, and

gain selection is accomplished via connections to the

±inputs.

Applying the input signal to +IN and floating -IN selects a gain

of +1, while grounding -IN selects a gain of +2. A gain of -1 is

obtained by applying the input signal to -IN with +IN grounded.

The table below summarizes these connections:

PC Board Layout

The frequency response of this amplifier depends greatly on

the amount of care taken in designing the PC board. The

use of low inductance components such as chip resis-

tors and chip capacitors is strongly recommended,

while a solid ground plane is a must!

Attention should be given to decoupling the power supplies.

A large value (10

µF) tantalum in parallel with a small value

(0.1

µF) chip capacitor works well in most cases.

Terminated microstrip signal lines are recommended at the input

and output of the device. Capacitance directly on the output must

be minimized, or isolated as discussed in the next section.

For unity gain applications, care must also be taken to minimize

the capacitance to ground seen by the amplifier’s inverting

input. At higher frequencies this capacitance will tend to short

the -INPUT to GND, resulting in a closed loop gain which

increases with frequency. This will cause excessive high

frequency peaking and potentially other problems as well.

An example of a good high frequency layout is the Evaluation

Board shown in Figure 2.

Driving Capacitive Loads

Capacitive loads, such as an A/D input, or an improperly

terminated transmission line will degrade the amplifier’s phase

margin resulting in frequency response peaking and possible oscil-

lations. In most cases, the oscillation can be avoided by placing a

Figure 1 details starting points for the selection of this resis-

tions for the optimum bandwidth, stability, and settling time,

but experimental fine tuning is recommended. Picking a

point above or to the right of the curve yields an overdamped

response, while points below or left of the curve indicate

areas of underdamped performance.

limiting system bandwidth well below the amplifier band-

illustrated in the curves), the maximum bandwidth is

obtained without sacrificing stability. Even so, bandwidth

does decrease as you move to the right along the curve.

all bandwidth is limited to 300MHz, and bandwidth drops

Evaluation Board

The performance of the HFA1114 may be evaluated using

the HFA11XX Evaluation Board, slightly modified as follows:

2. Remove the 500

connection open.

a 0

Ω resistor to GND.

4. Isolate Pin 5 from the stray board capacitance to minimize

peaking and overshoot.

The layout and modified schematic of the board are shown in

Figure 2.

To order evaluation boards (part number HFA11XXEVAL),

please contact your local sales office.

Note: The SOIC version may be evaluated in the DIP board by

using a SOIC-to-DIP adapter such as Aries Electronics Part

Number 08-350000-10.

GAIN

CONNECTIONS

+INPUT (PIN 3)

-INPUT (PIN 2)

-1

GND

Input

+1

Input

NC (Floating)

+2

Input

GND

LOAD CAPACITANCE (pF)

50

45

40

35

30

25

20

15

10

5

0

0

40

80

120

160

200

240

280

320

360

400

FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs

LOAD CAPACITANCE

1

2

3

4

8

7

6

5

+5V

10

µF

0.1

µF

50

Ω

GND

GND

-5V

0.1

µF

10

µF

50

Ω

IN

OUT

or 0

+IN

V+

GND

1

V-

OUT

TOP LAYOUT

BOTTOM LAYOUT

X

FIGURE 2. EVALUATION BOARD SCHEMATIC AND LAYOUT

HFA1114