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HMA510GC-55 Datasheet(PDF) 8 Page - Intersil Corporation

Part # HMA510GC-55
Description  16 x 16-Bit CMOS Parallel Multiplier Accumulator
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

HMA510GC-55 Datasheet(HTML) 8 Page - Intersil Corporation

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AC Test Circuit
NOTE: Includes Stray and Jig Capacitance
AC Testing Input, Output Waveforms
NOTE: AC Testing: All Parameters tested as per test circuit. Input
rise and fall times are driven at 1ns/V.
Output Delay
TD
-
25
-
30
ns
Three-State Enable Time
TENA
Note 4
-
25
-
30
ns
Three-State Disable Time
TDIS
Note 4
-
25
-
30
ns
Input Setup Time
TS
18
-
20
-
ns
Input Hold Time
TH
2-
2-
ns
Clock High Pulse Width
TPWH
15
-
20
-
ns
Clock Low Pulse Width
TPWL
15
-
20
-
ns
Output Rise Time
tR
From 0.8V to 2.0V
-
8
-
8
ns
Output Fall Time
tF
From 2.0V to 0.8V
-
8
-
8
ns
NOTES:
4. Transition is measured at
±200mV from steady state voltage with loading specified in AC Test Circuit; V1 = 1.5V, R1 = 500Ω and CL = 40pF.
5. For AC Test load, refer to AC Test Circuit with V1 = 2.4V, R1 = 500Ω and CL = 40pF.
AC Electrical Specifications VCC = 5.0V ±5%, TA = 0
oC to 70oC (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
HMA510-45
HMA510-55
UNITS
MIN
MAX
MIN
MAX
DUT
C1 (SEE NOTE)
V1
R1
0.3V
0V
VOH
VOL
1.5V
1.5V
Timing Diagram
FIGURE 9. SETUP AND HOLD TIME
FIGURE 10. THREE-STATE CONTROL
DATA
INPUT
CLOCK
INPUT
3.0V
1.5V
0V
3.0V
1.5V
0V
tS
tH
THREE
STATE
CONTROL
tDIS
tENA
1.5V
OUTPUT
STATE
HIGH IMPEDANCE
THREE


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