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AD7934 Datasheet(PDF) 10 Page - Analog Devices

Part # AD7934
Description  4-Channel, 1.5 MSPS, 12-Bit and 10-Bit Parallel ADCs with a Sequencer
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7934 Datasheet(HTML) 10 Page - Analog Devices

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AD7933/AD7934
Preliminary Technical Data
Pin No.
Mnemonic
Description
20
WR
Write Input. Active low logic input used in conjunction with CS to write data to the control register.
21
RD
Read Input. Active low logic input used in conjunction with CS to access the conversion result. The conversion
result is placed on the data bus following the falling edge of RD read while CS is low.
22
CS
Chip Select. Active low logic input used in conjunction with RD and WR to read conversion data or write data to
the control register.
23
AGND
Analog Ground. This is the ground reference point for all analog circuitry on the AD7933/AD7934. All analog
input signals and any external reference signal should be referred to this AGND voltage. The AGND and DGND
voltages should ideally be at the same potential and must not be more than 0.3 V apart, even on a transient
basis.
24
VREFIN/VREFOUT
Reference Input/Output. This pin is connected to the internal reference and is the reference source for the ADC.
The nominal internal reference voltage is 2.5 V and this appears at this pin. This pin can be overdriven by an
external reference. The input voltage range for the external reference is 0.1 V to 3.5 V for differential mode and
is 0.1 V to VDD in single-ended and pseudo-differential mode, depending on VDD.
25 to 28
VIN0 to VIN3
Analog Input 0 to Analog Input 3. Four analog input channels that are multiplexed into the on-chip track-and-
hold. The analog inputs can be programmed to be four single ended inputs, two fully differential pairs or two
pseudo-differential pairs by setting the MODE bits in the control register appropriately (see Table 9). The
analog input channel to be converted can either be selected by writing to the address bits (ADD1 and ADD0) in
the control register prior to the conversion, or the on-chip sequencer can be used. The input range for all input
channels can either be 0 V to VREF or 0 V to 2 × VREF and the coding can be binary or twos complement,
depending on the states of the RANGE and CODING bits in the control register. Any unsed input channels
should be connected to AGND to avoid noise pickup.
Rev. PrG | Page 10 of 32


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