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SN65HVD52 Datasheet(PDF) 8 Page - Texas Instruments |
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SN65HVD52 Datasheet(HTML) 8 Page - Texas Instruments |
8 / 23 page www.ti.com RECEIVER EQUALIZATION CHARACTERISTICS SN65HVD50-SN65HVD55 SN65HVD56-SN65HVD59 SLLS666 – SEPTEMBER 2005 over recommended operating conditions unless otherwise noted(1) PARAMETER TEST CONDITIONS MIN TYP(2) MAX UNIT 0 m HVD56, HVD58 PREVIEW ns HVD53 PREVIEW 100 m HVD56, HVD58 PREVIEW 25 Mbps HVD53 PREVIEW 150 m HVD56, HVD58 PREVIEW HVD53 PREVIEW 200 m HVD56, HVD58 PREVIEW HVD53 PREVIEW 200 m HVD56, HVD58 PREVIEW Pseudo-random NRZ HVD53 PREVIEW Peak-to-peak 10 Mbps 250 m code with a bit pattern tj(pp) eye-pattern HVD56, HVD58 PREVIEW length o 216-1, Belden jitter HVD53 PREVIEW 3105A cable 300 m HVD56, HVD58 PREVIEW HVD54 PREVIEW 5 Mbps 500 m HVD57, HVD59 PREVIEW HVD53 PREVIEW HVD54 PREVIEW 3 Mbps 500 m HVD56, HVD58 PREVIEW HVD57, HVD59 PREVIEW HVD54 PREVIEW 1 Mbps 1000 m HVD57, HVD59 PREVIEW (1) The HVD53 and HVD54 do not have receiver equalization but are specified for comparison. (2) All typical values are at VCC = 5 V, and temperature = 25°C. 8 |
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