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ISD94100 Datasheet(PDF) 10 Page - Nuvoton Technology Corporation |
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ISD94100 Datasheet(HTML) 10 Page - Nuvoton Technology Corporation |
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10 / 109 page  ISD94100 Series Datasheet Sep 09, 2019 Page 10 of 109 Rev1.13 Push-Pull output Open-Drain output Input only with high impendence – TTL/Schmitt trigger input selectable – I/O pin configured as interrupt source with edge/level trigger setting – Supports high slew driver and high sink current I/O (up to 20mA at 3.3V) – Supports software selectable slew rate control – Supports 5V tolerance function on subset of GPIO except analog I/O PDMA (Peripheral DMA) – Supports 16 independent configurable channels for automatic data transfer between memories and peripherals – Supports stride function. – Channel 0, 1 supports time-out function for each channel. – Supports Basic and Scatter-Gather Transfer modes – Each channel supports circular buffer management using Scatter-Gather Transfer mode – Supports two types of priorities modes: Fixed-priority and Round-robin modes – Supports byte-, half-word- and word-access – Supports single and burst transfer type – Supports source and destination address can be increment or fixed. – DMA transfer count up to 65536. Multi-Function Timer (MFT, Timer + PWM) – TIMER mode Supports 4 sets of 32-bit timers with 24-bit up-timer and 8-bit prescale counter, 24-bit up counter value is readable. Independent clock source for each timer Provides One-shot, Periodic, Toggle and Continuous Counting operation modes Supports event counting function to count the event from external pin Supports input capture function to capture or reset counter value Supports external capture pin event for interval measurement. Supports external capture pin event to reset 24-bit up counter. Supports chip wake-up from Idle/Power-down mode if a timer interrupt signal is generated Support Timer0 ~ Timer3 time-out interrupt signal or capture interrupt signal to trigger PWM, EADC and DMA. Supports Inter-Timer trigger mode – PWM mode Supports four 16-bit PWM counters with 10-bit dead time generator Supports 12-bit pre-scale for PWM. Supports independent mode for PWM output channel Supports 8 channel PWM outputs in complementary mode Supports mask function and tri-state enable for each PWM pin Supports interrupt on the following events: PWM counter match zero, period value or compared value Supports trigger EADC on the following events: PWM counter match zero, period value or compared value PWM – Supports up to 6 independent PWM outputs with 16-bit resolution – Supports maximum clock frequency up to 200MHz – Supports 12-bit clock prescale – Supports dead time with maximum divided 12-bit prescale – Supports one-shot or auto-reload counter operation mode – Supports up, down or up-down PWM counter type – Supports synchronous function for phase control – Supports counter synchronous start function |
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