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AS7C1025B-10JI Datasheet(PDF) 2 Page - Alliance Semiconductor Corporation |
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AS7C1025B-10JI Datasheet(HTML) 2 Page - Alliance Semiconductor Corporation |
2 / 9 page AS7C1025B 3/26/04, v. 1.3 Alliance Semiconductor P. 2 of 9 ® Functional description The AS7C1025B is a high-performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) devices organized as 131,072 x 8 bits. They are designed for memory applications where fast data access, low power, and simple interfacing are desired. Equal address access and cycle times (tAA, tRC, tWC) of 10/12/15/20 ns with output enable access times (tOE) of 5/6/7/8 ns are ideal for high- performance applications. The chip enable input CE permits easy memory and expansion with multiple-bank memory systems. When CE is high, the device enters standby mode. If inputs are still toggling, the device will consume ISB power. If the bus is static, then full standby power is reached (ISB1). For example, the AS7C1026B is guaranteed not to exceed 55 mW under nominal full standby conditions. A write cycle is accomplished by asserting write enable (WE) and chip enable (CE). Data on the input pins I/O0 through I/O7 is written on the rising edge of WE (write cycle 1) or CE (write cycle 2). To avoid bus contention, external devices should drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE). A read cycle is accomplished by asserting output enable (OE) and chip enable (CE), with write enable (WE) high. The chips drive I/O pins with the data word referenced by the input address. When either chip enable or output enable is inactive or write enable is active, output drivers stay in high-impedance mode. All chip inputs and outputs are TTL-compatible, and operation is from a single 5 V supply. The AS7C1025B is packaged in common industry standard packages. NOTE: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and func- tional operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Key: X = don’t care, L = low, H = high. Absolute maximum ratings Parameter Symbol Min Max Unit Voltage on VCC relative to GND Vt1 –0.50 +7.0 V Voltage on any pin relative to GND Vt2 –0.50 VCC + 0.5 V Power dissipation PD –1.0 W Storage temperature (plastic) Tstg –65 +150 o C Ambient temperature with VCC applied Tbias –55 +125 o C DC current into outputs (low) IOUT –20 mA Truth table CE WE OE Data Mode H X X High Z Standby (ISB, ISB1) L H H High Z Output disable (ICC) LHL DOUT Read (ICC) LL X DIN Write (ICC) |
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