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AS7C1026B

3/26/04, v 1.3

Alliance Semiconductor

P. 2 of 10

Functional description

The AS7C1026B is a high-performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) device organized as 65,536 words ×

16 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired.

high-performance applications.

A write cycle is accomplished by asserting write enable (WE) and chip enable (CE). Data on the input pins I/O0 through I/O15 is written on

the rising edge of WE (write cycle 1) or CE (write cycle 2). To avoid bus contention, external devices should drive I/O pins only after

outputs have been disabled with output enable (OE) or write enable (WE).

A read cycle is accomplished by asserting output enable (OE) and chip enable (CE) with write enable (WE) high. The chip drives I/O pins

with the data word referenced by the input address. When either chip enable or output enable is inactive or write enable is active, output

drivers stay in high-impedance mode.

The device provides multiple center power and ground pins, and separate byte enable controls, allowing individual bytes to be written and

read. LB controls the lower bits, I/O0 through I/O7, and UB controls the higher bits, I/O8 through I/O15.

All chip inputs and outputs are TTL-compatible, and operation is from a single 5 V supply. The device is packaged in common industry

standard packages.

Note: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and func-

tional operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure

to absolute maximum rating conditions for extended periods may affect reliability.

Absolute maximum ratings

Parameter

Symbol

Min

Max

Unit

–0.50

+7.0

V

Voltage on any pin relative to GND

–0.50

V

Power dissipation

–1.0

W

Storage temperature (plastic)

–65

+150

°C

Ambient temperature with VCC

applied

–55

+125

°C

DC current into outputs (low)

–20

mA

Truth table

CE

WE

OE

LB

UB

I/O0–I/O7

I/O8–I/O15

Mode

H

XXXX

High Z

High Z

LHL

L

H

High Z

LHLHL

High Z

LHL

L

L

LL

X

L

L

LL

X

L

H

High Z

LL

X

H

L

High Z

L

L

H

X

H

X

X

H

X

H

High Z

High Z