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AS7C4096A-12JC Datasheet(PDF) 5 Page - Alliance Semiconductor Corporation |
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AS7C4096A-12JC Datasheet(HTML) 5 Page - Alliance Semiconductor Corporation |
5 / 10 page ® AS7C4096A 5/27/05, v. 1.1 Alliance Semiconductor P. 5 of 10 Write waveform 1 (WE controlled)9 Write cycle (over the operating range)9 Parameter Symbol –10 –12 –15 –20 Unit Notes Min Max Min Max Min Max Min Max Write cycle time tWC 10–12 – 15–20– ns Chip enable (CE) to write end tCW 7–8– 10 – 12 – ns Address setup to write end tAW 7–8– 10 – 12 – ns Address setup time tAS 0–0– 0–0 – ns Write pulse width (OE = high) tWP1 7–8– 10 – 12 – ns Write pulse width (OE = low tWP2 10–12 – 15–20– ns Address hold from end of write tAH 0–0– 0–0 – ns Write recovery time tWR 0–0– 0–0 – ns Data valid to write end tDW 5–6– 7–9 – ns Data hold time tDH 0–0– 0–0 – ns 3,4 Write enable to output in high Z tWZ 2526 272 9 ns 3,4 Output active from write end tOW 3–3– 3–3 – ns 3,4 tAW tAH tWC Address WE DOUT tDH tOW tDW tWZ tWP tAS Data valid DIN tWR |
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