AS7C1026B-12JIN datasheet(5/10 Pages) ALSC

Part #	AS7C1026B-12JIN

Description	5 V 64K X 16 CMOS SRAM

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Manufacturer	ALSC [Alliance Semiconductor Corporation]

Direct Link	https://www.alliancememory.com

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5 / 10 page

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AS7C1026B

3/26/04, v 1.3

Alliance Semiconductor

P. 5 of 10

Read waveform 2 (OE, CE, UB, LB controlled)3,6,8,9

Write cycle (over the operating range) 11

Parameter

Symbol

-10

-12

-15

-20

Unit

Notes

Min Max Min Max Min Max Min Max

Write cycle time

tWC

10

–

12

–

15

–

20

-

ns

Chip enable (CE) to write end

tCW

8–9

–

10

–

12

-

ns

Address setup to write end

tAW

8–9

–

10

–

12

-

ns

Address setup time

tAS

0

–

0

–

0–0

-

ns

Write pulse width

tWP

7

–

8–9

–

12

-

ns

Write recovery time

tWR

0

–

0

–

0–0

-

ns

Address hold from end of write

tAH

0

–

0

–

0–0

-

ns

Data valid to write end

tDW

5

–

6–8

–

10

-

ns

Data hold time

tDH

0

–

0

–

0–0

-

ns

5

Write enable to output in high Z

tWZ

–

5

–6–

7

-

8

ns

4, 5

Output active from write end

tOW

1

–

1

–

1–2

-

ns

4, 5

Byte select low to end of write

tBW

7

–

8

–

9–9

-

ns

Data valid

tRC

tAA

tBLZ

tBA

tOE

tOLZ

tOH

tOHZ

tHZ

tBHZ

tACE

tLZ

Address

OE

CE

LB, UB

DataIN

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AS7C1026B-12JIN Datasheet(PDF) 5 Page - Alliance Semiconductor Corporation

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