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AS7C1025B-15JCN Datasheet(PDF) 4 Page - Alliance Semiconductor Corporation |
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AS7C1025B-15JCN Datasheet(HTML) 4 Page - Alliance Semiconductor Corporation |
4 / 9 page AS7C1025B 3/26/04, v. 1.3 Alliance Semiconductor P. 4 of 9 ® Key to switching waveforms Read waveform 1 (address controlled)3,6,7,9 Read waveform 2 (CE and OE controlled)3,6,8,9 Read cycle (over the operating range)3,9 Parameter Symbol -10 -12 -15 -20 Unit Notes Min Max Min Max Min Max Min Max Read cycle time tRC 10 - 12 – 15 – 20 – ns Address access time tAA - 10 – 12 – 15 – 20 ns 3 Chip enable (CE) access time tACE - 10 – 12 – 15 – 20 ns 3 Output enable (OE) access time tOE -5 – 6 – 7 – 8 ns Output hold from address change tOH 3 - 3 – 3 – 3 – ns 5 CE low to output in low Z tCLZ 3 - 3 – 3 – 3 – ns 4, 5 CE low to output in high Z tCHZ - 4 – 5 – 6 – 7 ns 4, 5 OE low to output in low Z tOLZ 0 - 0 – 0 – 0 – ns 4, 5 OE high to output in high Z tOHZ - 4 – 5 – 6 – 7 ns 4, 5 Power up time tPU 0 - 0 – 0 – 0 – ns 4, 5 Power down time tPD - 10 – 12 – 15 – 20 ns 4, 5 Undefined/don’t care Falling input Rising input Address DOUT Data valid tOH tAA tRC current Supply OE DOUT tOE tOLZ tACE tCHZ tCLZ tPU tPD ICC ISB 50% 50% Data valid tRC1 CE tOHZ |
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