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AS7C3513B

3/24/04, v.1.2

Alliance Semiconductor

P. 2 of 10

Functional description

The AS7C3513B is a high performance CMOS 524,288-bit Static Random Access Memory (SRAM) device organized as 32,768 words × 16

bits. They are designed for memory applications where fast data access, low power, and simple interfacing are desired.

high performance applications. The chip enable input CE permits easy memory expansion with multiple-bank memory systems.

conditions.

A write cycle is accomplished by asserting write enable (WE), (UB) and/or (LB), and chip enable (CE). Data on the input pins I/O0 - I/O7,

and/or I/O8 – I/O15, is written on the rising edge of WE (write cycle 1) or CE (write cycle 2). To avoid bus contention, external devices

should drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).

A read cycle is accomplished by asserting output enable (OE), (UB) and (LB), and chip enable (CE), with write enable (WE) high. The chips

drive I/O pins with the data word referenced by the input address. When either chip enable or output enable is inactive, or write enable is

active, or (UB) and (LB), output drivers stay in high-impedance mode.

The devices provide multiple center power and ground pins, and separate byte enable controls, allowing individual bytes to be written and

read. LB controls the lower bits, I/O0 – I/O7, and UB controls the higher bits, I/O8 – I/O15.

All chip inputs and outputs are TTL-compatible. The AS7C3513B is packaged in common industry standard packages.

Absolute maximum ratings

NOTE: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and func-

tional operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure

to absolute maximum rating conditions for extended periods may affect reliability.

Truth table

Key: X = Don’t care; L = Low; H = High

Parameter

Symbol

Min

Max

Unit

–0.50

+5.0

V

Voltage on any pin relative to GND

–0.50

V

Power dissipation

–1.0

W

Storage temperature (plastic)

–65

+150

–55

+125

DC current into outputs (low)

–20

mA

CE

WE

OE

LB

UB

I/O0–I/O7

I/O8–I/O15

Mode

H

X

X

X

X

High Z

High Z

LHL

L

H

High Z

LHLHL

High Z

L

H

LLL

LL

X

L

L

LL

X

L

H

High Z

LL

X

H

L

High Z

L

L

H

X

H

X

X

H

X

H

High Z

High Z