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PCA9450 Datasheet(PDF) 27 Page - NXP Semiconductors |
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PCA9450 Datasheet(HTML) 27 Page - NXP Semiconductors |
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27 / 96 page  NXP Semiconductors PCA9450 Power management IC for i.MX 8M application processor family PCA9450 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2019. All rights reserved. Product data sheet Rev. 1.0 — 19 November 2019 27 / 96 aaa-035723 PWRONI WDOGBI RSVD VR_FLT1I VR_FLT2I LOWVSYSI INT PWRONS WDOG_BS RSVD VR_FLT1_S VR_FLT2_S LOWVSYS_S THERM_105S THERM_105I INT1 STATUS1 SW_OCP RSVD BUCK6_FLT BUCK5_FLT BUCK4_FLT BUCK3_FLT BUCK2_FLT BUCK1_FLT VRFLT1_STS VRFLT2_STS RSVD RSVD RSVD LDO5_FLT LDO4_FLT LDO3_FLT LDO2_FLT LDO1_FLT THERM_125S THERM_125I INT1 MASK 105°C Die Temp 125°C PMIC_ON_REQ VSYS VSYS UVLO + Delta WDOG_B RSVD RSVD BUCK6_FLT_M BUCK5_FLT_M BUCK4_FLT_M BUCK3_FLT_M BUCK2_FLT_M BUCK1_FLT_M VRFLT1_MASK VRFLT2_MASK RSVD RSVD RSVD LDO5_FLT_M LDO4_FLT_M LDO3_FLT_M LDO2_FLT_M LDO1_FLT_M Deb Deb Figure 20. Interrupt diagram 8 Software interface PCA9450 implements I2C-bus slave interface and it interfaces with the host system. The host processor can issue commands, monitor status and receive response through this bus. A detailed description of the I2C-bus specification, with applications, is given in UM10204, “I2C-bus specification and user manual” [Ref. 4]. PCA9450 supports I2C-bus data transfers in Standard-mode (100 kbit/s), Fast-mode (400 kbit/s) and Fast-mode plus (1 Mbit/s). The I2C address at Power-On Reset is shown in Table 19 Table 19. PCA9450 I2C Slave Address 7-bit Slave Address 8-bit Write Address 8-bit Read Address 0x25, 0b 010 0101 0x4A, 0b 0100 1010 0x4B, 0b 0100 1011 I2C register reset type Type S1 : Reset condition = VSYS < VSYS_POR Type S : Reset condition = VSYS < VSYS_UVLO Type O : Reset condition = (VSYS < VSYS_UVLO) || (Cold Reset) || (Warm Reset) || (Falling edge of PMIC_ON_REQ) || (SW_RST) || (FAULT_SD) |
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