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NTP53X2 Datasheet(PDF) 34 Page - NXP Semiconductors |
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NTP53X2 Datasheet(HTML) 34 Page - NXP Semiconductors |
34 / 133 page NXP Semiconductors NTP53x2 NTAG 5 link - NFC Forum-compliant I2C bridge NTP53x2 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved. Product data sheet Rev. 3.3 — 3 July 2020 COMPANY PUBLIC 544533 34 / 133 Table 42. PWM and GPIO Configuration Location (PWM_GPIO_CONFIG) Block Address NFC I2C Byte 0 Byte 1 Byte 2 Byte 3 39h 1039h PWM_GPIO_ CONFIG_0 PWM_GPIO_ CONFIG_1 RFU Table 43. PWM and GPIO Configuration Definition (PWM_GPIO_CONFIG_0) Bit Name Value Description 0b Output status on pad is LOW (default) 7 SDA_GPIO1_OUT_STATUS 1b Output status on pad is HIGH 0b Output status on pad is LOW (default) 6 SCL_GPIO0_OUT_STATUS 1b Output status on pad is HIGH 5 to 4 RFU 00b 0b Output (Default) 3 SDA_GPIO1 1b Input 0b Output (Default) 2 SCL_GPIO0 1b Input 0b GPIO (Default) 1 SDA_GPIO1_PWM1 1b PWM 0b GPIO (Default) 0 SCL_GPIO0_PWM0 1b PWM Table 44. PWM and GPIO Configuration Definition (PWM_GPIO_CONFIG_1 and PWM_GPIO_CONFIG_1_REG) Bit Name Value Description 7 6 PWM1_PRESCALE 00b Pre-scalar configuration for PWM1 channel (default 00b) 5 4 PWM0_PRESCALE 00b Pre-scalar configuration for PWM0 channel (default 00b) 00b 6-bit resolution (default) 3 01b 8-bit resolution 10b 10-bit resolution 2 PWM1_RESOLUTION_CONF 11b 12-bit resolution 00b 6-bit resolution (default) 1 01b 8-bit resolution 10b 10-bit resolution 0 PWM0_RESOLUTION_CONF 11b 12-bit resolution |
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