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JN5189 Datasheet(PDF) 40 Page - NXP Semiconductors |
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JN5189 Datasheet(HTML) 40 Page - NXP Semiconductors |
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40 / 92 page  JN5189 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved. Product data sheet Rev. 1.2 — June 2020 40 of 92 NXP Semiconductors IEEE 802.15.4 low power wireless MCU JN5189(T)/JN5188(T) • Direct debug access to all memories, registers, and peripherals • No target resources are required for the debugging session • Breakpoints: the Cortex-M4 includes 8 instruction breakpoints that can also be used to remap instruction addresses for code patches. Two literal comparators that can also be used to remap addresses for patches to literal values. • Watchpoints: the Cortex-M4 includes 4 data watchpoints that can also be used as triggers • Instrumentation Trace Macrocell allows additional software controlled trace for the Cortex-M4 8.19.2 Basic configuration The serial wire debug pins are enabled by default. 8.20 Wireless transceiver The wireless transceiver comprises a 2.4 GHz radio, modem, a baseband processor and PHY controller. These blocks, with protocol software provided as a library, implement an IEEE802.15.4 standards-based wireless transceiver that transmits and receives data over the air in the unlicensed 2.4 GHz band. To support the IEEE802.15.4 protocol an AES engine is also provided, in the JN5189, to accelerate the required encryption features. Fig 5. Radio architecture CALIBRATION PA RADIO ADC TRANSFORMER REFERENCE AND BIAS PLL SIGMA DELTA AGC DIVIDER BY 2 LNA IF AMP DAC |
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