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BQ79600-Q1 Datasheet(PDF) 18 Page - Texas Instruments

Part # BQ79600-Q1
Description  BQ79600-Q1 Automotive SPI/UART Communication Interface Functional-Safety Compliant With Automatic Host Wakeup
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

BQ79600-Q1 Datasheet(HTML) 18 Page - Texas Instruments

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0000 1111 0000 1011 0000 0011 1001 0100)
After Initialization (XOR with 0xFFFF) = 0b0 1111 1110 1111 1111 0100 0000 1111 0000 1101 0000 0000
0011 1001 0100
1111 1110 1111 1111 0100 0000 1111 0000 1101 0000 0000 0011 1001 010 #delete leading zeros from
previous result
1100 0000 0000 0010 1 #XOR with polynomial
0011 1110 1111 1101 1100 0000 1111 0000 1101 0000 0000 0011 1001 0100
11 1110 1111 1101 1100 0000 1111 0000 1101 0000 0000 0011 1001 0100 #delete leading zeros from
previous result
11 0000 0000 0000 101 #XOR with polynomial
00 1110 1111 1101 0110 0000 1111 0000 1101 0000 0000 0011 1001 0100
……
……
……
1100 0110 0000 0010 1001 0100
1100 0000 0000 0010 1 #XOR with polynomial
0000 0110 0000 0000 0001 0100
1 1000 0000 0000 0101 00
1 1000 0000 0000 0101 #XOR with polynomial
0 0000 0000 0000 0000 00
0x0000 #verfiy that CRC checks out valid
Note
The result of ‘0b0000 0000 0000 0000’ for the CRC indicates a successful check.
7.3.2.1.2 Physical Layer
7.3.2.1.2.1 UART
Communication between host and BQ79600-Q1 can be configured to UART mode, refer to Section 7.3.1.3. The
UART interface baud rate is default to 1Mbps at power up or digital reset. The UART interface follows the
standard serial protocol of 8-N-1 (see Figure 7-10), where it sends information as a START bit, followed by eight
data bits, and then one STOP bit. The STOP bit indicates the end of the byte. The protocol also supports two
STOP bits. When the device is configured as 2 stop bits ([TWO_STOP_EN] = 1, stack devices should also be
set as two stop bits), the UART response frame from the device to MCU will always return with 2 stop bits.
The UART sends data on the TX pin and receives data on the RX pin. When idle, the TX and RX are high. TX is
always pulled to VIO internally while in ACTIVE or SLEEP mode, whether enabled or disabled.
The UART interface is strictly a half-duplex interface. While transmitting, any attempted communication on RX is
ignored. The only exception is Section 7.3.2.1.2.1.2.
bit0
bit1
bit2
bit3
bit4
bit5
bit6
bit7
START
. . .
bit period = 1/ baud rate
LSB
Stop is
oÁ Ç•
Z1[
MSB
STOP
. . .
1 or 2 bit
period
Start is
oÁ Ç•
Z0[
Figure 7-10. UART Character Definition
Note: User can change baud rate using register bit [UART_VIF_BAUD] for debug purpose.
7.3.2.1.2.1.1 TX HOLD OFF
UART transmitter is configurable to wait a specified number of bit periods after the last bit reception of Single
Device read command frame from host before starting transmitting Response Frame using the TX_HOLD_OFF
register, as showed in Figure 7-11. This provides time for the host to switch the bus direction at the end of its
transmission.
Note
Host does not need to configure register TX_HOLD_OFF in BQ79600-Q1 if Stack Read command is
used. Host shall not use Broadcast Read Command.
BQ79600-Q1
SLUSDS1A – NOVEMBER 2019 – REVISED AUGUST 2020
www.ti.com
18
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Product Folder Links: BQ79600-Q1


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