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DRV8714-Q1 Datasheet(PDF) 60 Page - Texas Instruments |
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DRV8714-Q1 Datasheet(HTML) 60 Page - Texas Instruments |
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60 / 144 page  DRV8714-Q1 Advanced Function Register Map provides advanced control functions described in the Propagation Delay Reduction (PDR), Duty Cycle Compensation (DCC), and Slew Time Control (STC) sections. These are not necessary for typical use cases of the DRV871x-Q1 and may be utilized as needed to meet specific system requirements. Table 8-23. DRV8714-Q1 Advanced Function Register Map Name 7 6 5 4 3 2 1 0 Type Addr. AGD_CTRL1 AGD_THR AGD_ISTRONG RSVD R/W 2Ah PDR_CTRL1 PRE_MAX_1 T_DON_DOFF_1 R/W 2Bh PDR_CTRL2 PRE_MAX_2 T_DON_DOFF_2 R/W 2Ch PDR_CTRL3 PRE_MAX_3 T_DON_DOFF_3 R/W 2Dh PDR_CTRL4 PRE_MAX_4 T_DON_DOFF_4 R/W 2Eh PDR_CTRL5 T_PRE_CHR_1 T_PRE_DCHR_1 PRE_CHR_INIT_1 PRE_DCHR_INIT_1 R/W 2Fh PDR_CTRL6 T_PRE_CHR_2 T_PRE_DCHR_2 PRE_CHR_INIT_2 PRE_DCHR_INIT_2 R/W 30h PDR_CTRL7 T_PRE_CHR_3 T_PRE_DCHR_3 PRE_CHR_INIT_3 PRE_DCHR_INIT_3 R/W 31h PDR_CTRL8 T_PRE_CHR_4 T_PRE_DCHR_4 PRE_CHR_INIT_4 PRE_DCHR_INIT_4 R/W 32h PDR_CTRL9 KP_PDR_1 KP_PDR_2 R/W 33h PDR_CTRL10 KP_PDR_3 KP_PDR_4 R/W 34h STC_CTRL1 T_RISE_FALL_1 KP_SLEW_1 R/W 35h STC_CTRL2 T_RISE_FALL_2 KP_SLEW_2 R/W 36h STC_CTRL3 T_RISE_FALL_3 KP_SLEW_3 R/W 37h STC_CTRL4 T_RISE_FALL_4 KP_SLEW_4 R/W 38h DCC_CTRL1 EN_DCC_1 EN_DCC_2 EN_DCC_3 EN_DCC_4 IDIR_MAN_1 IDIR_MAN_2 IDIR_MAN_3 IDIR_MAN_4 R/W 39h PST_CTRL1 FW_MAX_1 FW_MAX_2 FW_MAX_3 FW_MAX_4 EN_PST_DLY_ 1 EN_PST_DLY_ 2 EN_PST_DLY_ 3 EN_PST_DLY_ 4 R/W 3Ah PST_CTRL2 KP_PST_1 KP_PST_2 KP_PST_3 KP_PST_4 R/W 3Bh SGD_STAT1 IDIR_1 IDIR_2 IDIR_3 IDIR_4 IDIR_FLT_1 IDIR_FLT_2 IDIR_FLT_3 IDIR_FLT_4 R 3Ch SGD_STAT2 PRE_CHR_OF_ 1 PRE_CHR_OF_ 2 PRE_CHR_OF_ 3 PRE_CHR_OF_ 4 PRE_DCHR_O F_1 PRE_DCHR_O F_2 PRE_DCHR_O F_3 PRE_DCHR_O F_4 R 3Dh SGD_STAT3 STC_FLT_F_1 STC_FLT_F_2 STC_FLT_F_3 STC_FLT_F_4 STC_FLT_R_1 STC_FLT_R_2 STC_FLT_R_3 STC_FLT_R_4 R 3Eh 8.6.3 DRV8718-Q1 Register Descriptions 8.6.3.1 DRV8718-Q1_STATUS Registers Table 8-24 lists the DRV8718-Q1_STATUS registers. All register offset addresses not listed in Table 8-24 should be considered as reserved locations and the register contents should not be modified. Table 8-24. DRV8718-Q1_STATUS Registers Address Acronym Register Name Section 0h IC_STAT1 Global fault and warning status indicators Go 1h VDS_STAT1 Half-bridge 1-4 VDS overcurrent fault status indicators Go 2h VDS_STAT2 Half-bridge 5-8 VDS overcurrent fault status indicators Go 3h VGS_STAT1 Half-bridge 1-4 VGS gate fault status indicators Go 4h VGS_STAT2 Half-bridge 5-8 VGS gate fault status indicators Go 5h IC_STAT2 Voltage, temperature and interface fault status indicators Go 6h IC_STAT3 Device variant ID status register Go Complex bit access types are encoded to fit into small table cells. Table 8-25 shows the codes that are used for access types in this section. Table 8-25. DRV8718-Q1_STATUS Access Type Codes Access Type Code Description Read Type R R Read Reset or Default Value DRV8714-Q1, DRV8718-Q1 SLVSEA2 – AUGUST 2020 www.ti.com 60 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: DRV8714-Q1 DRV8718-Q1 |
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