AS7C33512NTD32A datasheet(1/18 Pages) ALSC

Part #	AS7C33512NTD32A

Description	3.3V 512K x 32/36 Pipelined SRAM with NTD

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Manufacturer	ALSC [Alliance Semiconductor Corporation]

Direct Link	https://www.alliancememory.com

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April 2005

®

AS7C33512NTD32A

AS7C33512NTD36A

4/21/05, v 2.8

Alliance Semiconductor

P. 1 of 18

3.3V 512K × 32/36 Pipelined SRAM with NTDTM

Features

• Organization: 524,288 words × 32 or 36 bits

•NTD™ architecture for efficient bus operation

• Fast clock speeds to 166 MHz

• Fast clock to data access: 3.4/3.8 ns

•Fast OE access time: 3.4/3.8 ns

• Fully synchronous operation

• Asynchronous output enable control

• Available in 100-pin TQFP packages

• Individual byte write and global write

• Clock enable for operation hold

• Multiple chip enables for easy expansion

• 3.3V core power supply

• 2.5V or 3.3V I/O operation with separate VDDQ

• Self-timed write cycles

• Interleaved or linear burst modes

• Snooze mode for standby operation

Logic block diagram

Selection guide

-166

-133

Units

Minimum cycle time

6

7.5

ns

Maximum clock frequency

166

133

MHz

Maximum clock access time

3.4

3.8

ns

Maximum operating current

300

275

mA

Maximum standby current

90

80

mA

Maximum CMOS standby current (DC)

60

mA

Address

D

Q

CLK

register

Output

Register

DQ[a,b,c,d]

19

CLK

CE0

CE1

CE2

A[18:0]

OE

CLK

CEN

Control

CLK

logic

Data

D

Q

CLK

Input

Register

32/36

OE

512K x 32/36

SRAM

Array

R/W

DQ[a,b,c,d]

BWb

BWd

CLK

Q

D

ADV / LD

LBO

Burst logic

addr. registers

Write delay

19

ZZ

CLK

32/36

BWc

BWa

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AS7C33512NTD32A Datasheet(PDF) 1 Page - Alliance Semiconductor Corporation

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