AS7C34098A-12JC datasheet(4/10 Pages) ALSC

Part #	AS7C34098A-12JC

Description	3.3 V 256 K x 16 CMOS SRAM

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Manufacturer	ALSC [Alliance Semiconductor Corporation]

Direct Link	https://www.alliancememory.com

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4 / 10 page

®

AS7C34098A

8/17/04,v. 2.1

Alliance Semiconductor

P. 4 of 10

Key to switching waveforms

Read waveform 1 (address controlled)6,7,9

Read cycle (over the operating range)3,9

Parameter

Symbol

–10

–12

–15

–20

Unit Notes

Min

Max

Min

Max

Min

Max

Min

Max

Read cycle time

tRC

10

–

12

–

15

–

20

–

ns

Address access time

tAA

–

10

–

12

–

15

–

20

ns

Chip enable (CE) access time

tACE

–

10

–

12

–

15

–

20

ns

Output enable (OE) access time

tOE

–

4

–5–6–7

ns

Output hold from address change

tOH

3

–

3–3–3–

ns

5

CE Low to output in low Z

tCLZ

3

–

3–3–3–

ns

4, 5

CE High to output in high Z

tCHZ

–

5

–6–7–9

ns

4, 5

OE Low to output in low Z

tOLZ

0

–

0–0–0–

ns

4, 5

OE High to output in high Z

tOHZ

–

5

–6–7–9

ns

4, 5

LB, UB access time

tBA

–

5

–6–7–8

ns

LB, UB Low to output in low Z

tBLZ

0

–

0–0–0–

ns

LB, UB High to output in high Z

tBHZ

–

5

–6–7–9

ns

Power up time

tPU

0

–

0–0–0–

ns

5

Power down time

tPD

–

10

–

12

–

15

–

20

ns

5

Undefined/don’t care

Falling input

Rising input

tOH

tAA

tRC

tOH

DataOUT

Address

Data valid

Previous data valid

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