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AS80SSTVF16859-56KT Datasheet(PDF) 3 Page - Alliance Semiconductor Corporation |
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AS80SSTVF16859-56KT Datasheet(HTML) 3 Page - Alliance Semiconductor Corporation |
3 / 13 page AS80SSTVF16859 8/6/03, v.0.10 Alliance Semiconductor P. 3 of 13 Pin Configuration (64-Pin TSSOP) Pin number Pin name Type Description 1, 2, 3, 4, 5, 8, 9, 10, 11, 12, 13, 14, 16, 17, 19, 20, 21, 22, 23, 24, 25, 28, 29, 30, 31, 32 Q(13:1) Output Data output 7, 15, 26, 34, 39, 43, 50, 54, 58, 63 GND PWR Ground 6, 18, 27, 33, 38, 47, 59, 64 VDDQ PWR Output supply voltage, 2.5 V nominal 35, 36, 40, 41, 42, 44, 52, 53, 55, 56, 57, 61, 62 D(13:1) Input Data input 48 CLK Input Positive master clock input 49 CLKB Input Negative master clock input 37, 46, 60 VDD PWR Core supply voltage, 2.5 V nominal 51 RESETB Input Reset (active low) 45 VREF Input Input reference voltage, 1.25 V nominal Pin Configuration (56-Pin MLF2) Pin number Pin name Type Description 1, 2, 3, 4, 5, 6, 7, 8, 10, 11, 12, 13, 14, 15, 16, 18, 19, 20, 21, 22, 50, 51, 52, 53, 54, 56 Q(13:1) Output Data output 37, 48 GND PWR Ground 9, 17, 23, 27, 34, 44, 49, 55 VDDQ PWR Output supply voltage, 2.5 V nominal 24, 25, 28, 29, 30, 31, 39, 40, 41, 42, 43, 46, 47 D(13:1) Input Data input 35 CLK Input Positive master clock input 36 CLKB Input Negative master clock input 26, 33, 45 VDD PWR Core supply voltage, 2.5 V nominal 38 RESETB Input Reset (active low) 32 VREF Input Input reference voltage, 1.25 V nominal – Center pad PWR Ground (VFQFN package only) |
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