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ASM3P623S00CF-08-SR Datasheet(PDF) 7 Page - Alliance Semiconductor Corporation |
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ASM3P623S00CF-08-SR Datasheet(HTML) 7 Page - Alliance Semiconductor Corporation |
7 / 16 page July 2005 ASM3P623S00A/B/C/D/E/F rev 1.0 Zero Cycle Slip Peak EMI Reduction IC 7 of 16 Notice: The information in this document is subject to change without notice. Test Circuits -Nd One clock cycle N=1 +Nd Input Modulated Output Nd represents the differential cycle slip when spread spectrum is ON Nd = ± 0.125 in the example Differential cycle slip VDD VDD GND GND CLKOUT CLOAD OUTPUTS TEST CIRCUIT # 1 0.1uF 0.1uF |
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