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ASM3X2105AFT Datasheet(PDF) 2 Page - Alliance Semiconductor Corporation |
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ASM3X2105AFT Datasheet(HTML) 2 Page - Alliance Semiconductor Corporation |
2 / 10 page October 2003 ASM3X2105A rev 1.0 Low Frequency EMI Reduction 2 of 10 Notice: The information in this document is subject to change without notice. 1 2 3 4 5 6 7 8 ASM3X2105A XIN /CLK XOUT DIV2 VSS SR0 SSON# MODOUT VDD Pin Configuration Pin Description Pin# Pin Name Type Description 1 XIN/CLK I Crystal connection or external reference frequency input. This pin has dual functions. It can be connected to either an external crystal or an external reference clock. 2 XOUT O Crystal connection. If using an external reference, this pin must be left unconnected. 3 DIV2 I Digital logic input used to select normal output mode or divide-by-2 output mode. When this pin is HIGH, the frequency of the output clock is the same as the input clock frequency. When it is tied LOW, the output frequency is half the input clock frequency. This pin has an internal pull-up resistor. 4 VSS P Ground to entire chip. 5 SR0 I Digital logic input used to select Spreading Range (Refer Spread Deviation Table). This pin has an internal pull-up resistor. 6 SSON# I Digital logic input used to enable Spread Spectrum function (Active LOW). Spread Spectrum function enabled when LOW, disabled when HIGH. This pin has an internal pull-low resistor. 7 MODOUT O Spread spectrum low EMI output. 8 VDD P Power supply for the entire chip (5V). Spread Deviation Table SR0 Spread Deviation (%) 1 ±1 0 Reserved |
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