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COP8ACC520N8 Datasheet(PDF) 11 Page - National Semiconductor (TI) |
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COP8ACC520N8 Datasheet(HTML) 11 Page - National Semiconductor (TI) |
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11 / 43 page  Pin Descriptions V CC and GND are the power supply pins. All VCC and GND pins must be connected. CKI is the clock input. This can come from an R/C generated oscillator, or a crystal oscillator (in conjunction with CKO). See Oscillator Description section. RESET is the master reset input. See Reset description section. The devices contain two bidirectional (one 8-bit, one 4-bit) I/O ports (G and L), where each individual bit may be inde- pendently configured as a weak pullup input, TRI-STATE® (Hi-Z) input or push pull output under program control. Ports G- and L- feature Schmitt trigger inputs. Three data memory address locations are allocated for each of these I/O ports. Each I/O port has two associated 8-bit memory mapped registers, the CONFIGURATION register and the output DATA register. A memory mapped address is also reserved for the input pins of each I/O port. (See the memory map for the various addresses associated with the I/O ports.) Figure 5 shows the I/O port configurations. The DATA and CON- FIGURATION registers allow for each port bit to be individu- ally configured under software control as shown below: PORT L is a 4-bit I/O port. All L-pins have Schmitt triggers on the inputs. The Port L supports Multi-Input Wake Up on all four pins. The Port L has the following alternate features: L7 MIWU or external interrupt L6 MIWU or external interrupt L5 MIWU or external interrupt L4 MIWU or external interrupt Configuration Data Port Set-Up Register Register 0 0 Hi-Z Input (TRI-STATE Output) 0 1 Input with Weak Pull-Up 1 0 Push-Pull Zero Output 1 1 Push-Pull One Output Please note: The lower 4 L-bits read all ones (L0:L3). This is independant from the states of the associated bits in the L-port Data- and Configuration register. The lower 4 bits in the L-port Data- and Configuration register can be used as general purpose status indicators (flags). Port G is an 8-bit port with 5 I/O pins (G0, G2–G5), an input pin (G6), and a dedicated output pin (G7). Pins G0 and G2–G6 all have Schmitt Triggers on their inputs. Pin G1 serves as the dedicated WDOUT WATCHDOG output, while pin G7 is either input or output depending on the oscillator mask option selected. With the crystal oscillator option se- lected, G7 serves as the dedicated output pin for the CKO clock output. With the single-pin R/C oscillator mask option selected, G7 serves as a general purpose input pin but is also used to bring the devices out of HALT mode with a low to high transition on G7. There are two registers associated with the G Port, a data register and a configuration register. Therefore, each of the 5 I/O bits (G0, G2–G5) can be indi- vidually configured under software control. Since G6 is an input only pin and G7 is the dedicated CKO clock output pin (crystal clock option) or general purpose input (R/C clock option), the associated bits in the data and configuration registers for G6 and G7 are used for special purpose functions as outlined below. Reading the G6 and G7 data bits will return zeros. Note that the chip will be placed in the HALT mode by writing a “1” to bit 7 of the Port G Data Register. Similarly the chip will be placed in the IDLE mode by writing a “1” to bit 6 of the Port G Data Register. Writing a “1” to bit 6 of the Port G Configuration Register enables the MICROWIRE/PLUS to operate with the alter- nate phase of the SK clock. The G7 configuration bit, if set high, enables the clock start up delay after HALT when the R/C clock configuration is used. Config Reg. Data Reg. G7 CLKDLY HALT G6 Alternate SK IDLE Port G has the following alternate features: G6 SI (MICROWIRE Serial Data Input) G5 SK (MICROWIRE Serial Clock) G4 SO (MICROWIRE Serial Data Output) G3 T1A (Timer T1 I/O) G2 T1B (Timer T1 Capture Input) G0 INTR (External Interrupt Input) Port G has the following dedicated functions: G7 CKO Oscillator dedicated output or general purpose input G1 WDOUT WATCHDOG and/or Clock Monitor dedicated output. Port I is an eight-bit Hi-Z input port. Port I0–I7 are used for the analog function block. The Port I has the following alternate features: I7 C OUT (Comparator Output) I6 Analog CH6 (Comparator Positive Input 6) I5 Analog CH5 (Comparator Positive Input 5) I4 Analog CH4 (Comparator Positive Input 4) I3 Analog CH3 (Comparator Positive Input 3/Comparator Output) I2 Analog CH2 (Comparator Positive Input 2) I1 I SRC (Comparator Negative Input/Current Source Out) I0 Analog CH1 (Comparator Positive Input 1) DS012865-52 FIGURE 5. I/P Port Configurations www.national.com 11 |
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