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C056K102K1X5CS Datasheet(PDF) 4 Page - Kemet Corporation |
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C056K102K1X5CS Datasheet(HTML) 4 Page - Kemet Corporation |
4 / 40 page MULTILAYER CERAMIC CAPACITORS/AXIAL & RADIAL LEADED KEMET Electronics Corporation, P.O. Box 5928, Greenville, S.C. 29606, (864) 963-6300 4 KEMET ® Multilayer ceramic capacitors are available in a variety of physical sizes and configurations, including leaded devices and surface mounted chips. Leaded styles include molded and conformally coated parts with axial and radial leads. However, the basic capacitor element is similar for all styles. It is called a chip and consists of formulated dielectric materials which have been cast into thin layers, interspersed with metal electrodes alternately exposed on opposite edges of the laminated structure. The entire structure is fired at high temperature to produce a monolithic block which provides high capacitance values in a small physical volume. After firing, conductive terminations are applied to opposite ends of the chip to make contact with the exposed electrodes. Termination materials and methods vary depending on the intended use. TEMPERATURE CHARACTERISTICS Ceramic dielectric materials can be formulated with a wide range of characteristics. The EIA standard for ceramic dielectric capacitors (RS-198) divides ceramic dielectrics into the following classes: Class I: Temperature compensating capacitors, suitable for resonant circuit application or other appli- cations where high Q and stability of capacitance char- acteristics are required. Class I capacitors have predictable temperature coefficients and are not affected by voltage, frequency or time. They are made from materials which are not ferro-electric, yielding superior stability but low volumetric efficiency. Class I capacitors are the most stable type available, but have the lowest volumetric efficiency. Class II: Stable capacitors, suitable for bypass or coupling applications or frequency discriminating circuits where Q and stability of capacitance char- acteristics are not of a major importance. Class II capacitors have temperature characteristics of ± 15% or less. They are made from materials which are ferro-electric, yielding higher volumetric efficiency but less stability. Class II capacitors are affected by temperature, voltage, frequency and time. Class III: General purpose capacitors, suitable for by-pass coupling or other applications in which dielectric losses, high insulation resistance and stability of capacitance characteristics are of little or no importance. Class III capacitors are similar to Class II capacitors except for temperature characteristics, which are greater than ± 15%. Class III capacitors have the highest volumetric efficiency and poorest stability of any type. KEMET leaded ceramic capacitors are offered in the three most popular temperature characteristics: C0G: Class I, with a temperature coefficient of 0 ± 30 ppm per degree C over an operating temperature range of - 55°C to + 125°C (Also known as “NP0”). X7R: Class II, with a maximum capacitance change of ± 15% over an operating temperature range of - 55°C to + 125°C. Z5U: Class III, with a maximum capacitance change of + 22% - 56% over an operating tem- perature range of + 10°C to + 85°C. Specified electrical limits for these three temperature characteristics are shown in Table 1. SPECIFIED ELECTRICAL LIMITS TEMPERATURE CHARACTERISTICS PARAMETER C0G X7R Z5U Dissipation Factor: Measured at following conditions: C0G — 1 kHz and 1 vrms if capacitance > 1000 pF 1 MHz and 1 vrms if capacitance ≤ 1000 pF 0.15% 2.5% 4.0% X7R — 1 kHz and 1 vrms* Z5U — 1 kHz and 0.5 vrms Dielectric Strength: 2.5 times rated DC voltage. Pass Subsequent IR Test Insulation Resistance (IR): At rated DC voltage, 1,000 M Ω-µF 1,000 M Ω-µF 1,000 M Ω-µF whichever of the two is smaller or 100 G Ω or 100 G Ω or 10 G Ω Temperature Characteristics: Range, °C -55 to 125 -55 to 125 +10 to 85 Capacitance Change without 0 ± 30 ppm/°C ±15% +22%, -56% DC voltage * 1 MHz and 1 vrms if capacitance ≤ 100 pF on military product. Table I 0988 Layout rev 8/9/2000 9:54 AM Page 4 |
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