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IZ4040B Datasheet(PDF) 1 Page - Integral Corp. |
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IZ4040B Datasheet(HTML) 1 Page - Integral Corp. |
1 / 7 page TECHNICAL DATA 1 INTEGRAL 12-Stage Binary Ripple Counter High-Voltage Silicon-Gate CMOS The IW4040B is ripple-carry binary counter. All counter stages are master-slave flip-flops. The state of a counter advances one count on the negative transition of each input pulse; a high level on the RESET line resets the counter to its all zeros state. Schmitt trigger action on the input-pulse line permits unlimited rise and fall times. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25 °C • Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply IW4040B N SUFFIX PLASTIC DIP 1 16 1 16 ORDERING INFORMATION IW4040BN Plastic DIP IW4040BD SOIC IZ4040B chip TA = -55 ° to 125° C for all packages FUNCTION TABLE Inputs Output Clock Reset Output state L No change L Advance to next state X H All Outputs are low H= high level L = low level X=don’t care PIN ASSIGNMENT LOGIC DIAGRAM PIN 16 =VCC PIN 8 = GND 10 9 7 6 5 3 2 4 13 12 14 11 15 1 CLOCK RESET Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 1 2 3 5 4 6 7 8 16 15 14 13 12 11 10 9 GND V CC Q12 Q6 Q5 Q7 Q4 Q3 Q2 Q10 Q8 Q9 RESET CLOCK Q1 Q11 |
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