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74LVCH322244AZKER Datasheet(PDF) 1 Page - Texas Instruments |
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74LVCH322244AZKER Datasheet(HTML) 1 Page - Texas Instruments |
1 / 11 page www.ti.com FEATURES DESCRIPTION/ORDERING INFORMATION SN74LVCH322244A 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS SCES405B – JULY 2002 – REVISED APRIL 2005 • Ioff Supports Partial-Power-Down Mode Operation • Member of the Texas Instruments Widebus+™ Family • Supports Mixed-Mode Signal Operation On All Ports (5-V Input/Output Voltage With • Operates From 1.65 V to 3.6 V 3.3-V VCC) • Inputs Accept Voltages to 5.5 V • Bus Hold on Data Inputs Eliminates the • Max tpd of 4.4 ns at 3.3 V Need for External Pullup/Pulldown • Output Ports Have Equivalent 26- Ω Series Resistors Resistors, So No External Resistors Are • Latch-Up Performance Exceeds 100 mA Required Per JESD 78, Class II • Typical VOLP (Output Ground Bounce) • ESD Protection Exceeds JESD 22 < 0.8 V at VCC = 3.3 V, TA = 25°C – 2000-V Human-Body Model (A114-A) • Typical VOHV (Output VOH Undershoot) – 200-V Machine Model (A115-A) > 2 V at VCC = 3.3 V, TA = 25°C – 1000-V Charged-Device Model (C101) This 32-bit buffer/driver is designed for 1.65-V to 3.6-V VCC operation. The SN74LVCH322244A is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as eight 4-bit buffers, four 8-bit buffers, two 16-bit buffers, or one 32-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. The outputs, which are designed to sink up to 12 mA, include equivalent 26- Ω resistors to reduce overshoot and undershoot. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING LFBGA – GKE SN74LVCH322244AKR –40°C to 85°C Tape and reel CG244A LFBGA – ZKE (Pb-free) 74LVCH322244AZKER (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (EACH 4-BIT BUFFER) INPUTS OUTPUT Y OE A L H H L L L H X Z Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus+ is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 2002–2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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