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PE3100G2DQIRL Datasheet(HTML) 2 Page - Silicom Ltd.

Part No. PE3100G2DQIRL
Description  Dual port Fiber 100 Gigabit Ethernet PCI Express Content Director Server Adapter
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Maker  SILICOM [Silicom Ltd.]
Homepage  https://www.silicom-usa.com/
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PE3100G2DQIRL Datasheet(HTML) 2 Page - Silicom Ltd.

  PE3100G2DQIRL Datasheet HTML 2Page - Silicom Ltd.  
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Silicom Ltd. Connectivity Solutions
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2
Key Features
Content Aware Director:
Provides intelligent packet redirection capability where rules specify which packets are directed to the host system
and which packets are directed to the other port (Bypass).
Provides intelligent packet redirection capability where all packets are directed to the other port (Bypassed) and
rules that specify which packets are copied to the host system (TAP).
Provides intelligent packet filtering / drop capability where rules specify which packets are directed to the host or
dropped.
Provides redirection rules that can be defined using source IP/ destination IP / Source Port / Destination Port /
VLAN tuples.
Redirection and packet filtering / drop are performed by the hardware itself in wire speed and do not require any
software and CPU host system power processing.
Intelligent redirect mechanism is controllable via software.
Intelligent routing mechanism is controllable via software.
Support up to 2x100G / QSFP28 ports.
100G QSFP28 Ports support 100GBase-SR4 and 100GBase-LR4.
40G QSFP28 Ports support 40GBase-SR4 and 40GBase-LR4
Common Key features:
Host Interface:
PCI Express 2X8 lane
Support PCI Express Base Specification Revision 3.0, 8GT/s, 5GT/s or 2.5GT/s
Intel FM10420 Features:
Single-element 4MB shared memory
L2/L3/L4/OpenFlow forwarding & ACLs
Stateless load balancing to CPUs
Datacenter Bridging (lossless Ethernet)
32K 40-bit TCAM entries
16K MAC & NextHop tables
Up to 300Gbps High-bandwidth CPU interface
2x 50Gbps 8-lane PCIe interfaces
Up to 2 40G (4 x 10G)
Up to 2 100G (4 x 25G)
300ns network latency (100GbE)
1000nS host-network latency
LAN Features:
256 queues per PCIe x8 interface
SR-IOV (64 VFs per PCIe x8 interface)
IP/TCP/UDP checksum
Receive side scaling (RSS)
TCP segmentation offload (TSO/LSO)
LEDs indicator for link/Activity


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