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M368L6523BUM-LCC Datasheet(PDF) 5 Page - Samsung semiconductor |
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M368L6523BUM-LCC Datasheet(HTML) 5 Page - Samsung semiconductor |
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5 / 25 page  DDR SDRAM 256MB, 512MB, 1GB Unbuffered DIMM Rev. 1.1 June 2005 Note : 1. * : These pins are not used in this module. 2. Pins 44, 45, 47, 49, 51, 134, 135, 140, 142, 144 are used on x72 module ( M381~ ), and are not used on x64 module. 3. Pins 111, 158 are NC for 1row modules & used for 2row modules[ M368(81)L2923B ]. 4. Pins 137, 138 are NC for x16 1Row module (M368L3324B). Pin Front Pin Front Pin Front Pin Back Pin Back Pin Back 1 VREF 32 A5 62 VDDQ 93 VSS 124 VSS 154 RAS 2 DQ0 33 DQ24 63 WE 94 DQ4 125 A6 155 DQ45 3 VSS 34 VSS 64 DQ41 95 DQ5 126 DQ28 156 VDDQ 4 DQ1 35 DQ25 65 CAS 96 VDDQ 127 DQ29 157 CS0 5 DQS0 36 DQS3 66 VSS 97 DM0 128 VDDQ 158 CS1 6 DQ2 37 A4 67 DQS5 98 DQ6 129 DM3 159 DM5 7 VDD 38 VDD 68 DQ42 99 DQ7 130 A3 160 VSS 8 DQ3 39 DQ26 69 DQ43 100 VSS 131 DQ30 161 DQ46 9 NC 40 DQ27 70 VDD 101 NC 132 VSS 162 DQ47 10 NC 41 A2 71 *CS2 102 NC 133 DQ31 163 *CS3 11 VSS 42 VSS 72 DQ48 103 NC 134 CB4 164 VDDQ 12 DQ8 43 A1 73 DQ49 104 VDDQ 135 CB5 165 DQ52 13 DQ9 44 CB0 74 VSS 105 DQ12 136 VDDQ 166 DQ53 14 DQS1 45 CB1 75 *CK2 106 DQ13 137 CK0 167 *A13 15 VDDQ 46 VDD 76 *CK2 107 DM1 138 CK0 168 VDD 16 CK1 47 DQS8 77 VDDQ 108 VDD 139 VSS 169 DM6 17 CK1 48 A0 78 DQS6 109 DQ14 140 DM8 170 DQ54 18 VSS 49 CB2 79 DQ50 110 DQ15 141 A10 171 DQ55 19 DQ10 50 VSS 80 DQ51 111 CKE1 142 CB6 172 VDDQ 20 DQ11 51 CB3 81 VSS 112 VDDQ 143 VDDQ 173 NC 21 CKE0 52 BA1 82 VDDID 113 *BA2 144 CB7 174 DQ60 22 VDDQ KEY 83 DQ56 114 DQ20 KEY 175 DQ61 23 DQ16 53 DQ32 84 DQ57 115 A12 145 VSS 176 VSS 24 DQ17 54 VDDQ 85 VDD 116 VSS 146 DQ36 177 DM7 25 DQS2 55 DQ33 86 DQS7 117 DQ21 147 DQ37 178 DQ62 26 VSS 56 DQS4 87 DQ58 118 A11 148 VDD 179 DQ63 27 A9 57 DQ34 88 DQ59 119 DM2 149 DM4 180 VDDQ 28 DQ18 58 VSS 89 VSS 120 VDD 150 DQ38 181 SA0 29 A7 59 BA0 90 NC 121 DQ22 151 DQ39 182 SA1 30 VDDQ 60 DQ35 91 SDA 122 A8 152 VSS 183 SA2 31 DQ19 61 DQ40 92 SCL 123 DQ23 153 DQ44 184 VDDSPD Note : VDDID defines relationship of VDD and VDDQ, and the default status of it is open (VDD=VDDQ) Pin Name Function Pin Name Function A0 ~ A12 Address input (Multiplexed) DM0 ~7,8(for ECC) Data - in mask BA0 ~ BA1A Bank Select Address VDD Power supply (2.5V for DDR333, 2.6V for DDR400) DQ0 ~ DQ63 Data input/output VDDQ Power Supply for DQS (2.5V for DDR333, 2.6V for DDR400) DQS0 ~ DQS8 Data Strobe input/output VSS Ground CK0,CK0 ~ CK2, CK2 Clock input VREF Power supply for reference CKE0, CKE1(for double banks) Clock enable input VDDSPD Serial EEPROM Power/Supply ( 2.3V to 3.6V ) CS0, CS1(for double banks) Chip select input SDA Serial data I/O RAS Row address strobe SCL Serial clock CAS Column address strobe SA0 ~ 2 Address in EEPROM WE Write enable VDDID VDD, VDDQ level detection CB0 ~ CB7(for x72 module) Check bit(Data-in/data-out) NC No connection 5.0 Pin Description 4.0 Pin Configuration (Front side/back side) |
Similar Part No. - M368L6523BUM-LCC |
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Similar Description - M368L6523BUM-LCC |
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