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HFBR-5720LP Datasheet(PDF) 2 Page - Agilent(Hewlett-Packard) |
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HFBR-5720LP Datasheet(HTML) 2 Page - Agilent(Hewlett-Packard) |
2 / 16 page 2 Figure 2. Connection diagram of module printed circuit board. VEET 20 TD– 19 TD+ 18 VEET 17 VCCT 16 VCCR 15 VEER 14 RD+ 13 RD– 12 VEER 11 TOP OF BOARD VEET 1 TxFAULT 2 Tx DISABLE 3 MOD-DEF(2) 4 MOD-DEF(1) 5 MOD-DEF(0) 6 RATE SELECT 7 LOS 8 VEER 9 VEER 10 BOTTOM OF BOARD (AS VIEWED THROUGH TOP OF BOARD) hot-plugging is ensured by design and by 3-stage pin sequencing at the electrical interface. The module housing makes initial contact with the host board EMI shield mitigating potential damage due to Electro-Static Discharge (ESD). The 3-stage pin contact sequencing involves (1) Ground, (2) Power, and then (3) Signal pins, making contact with the host board surface mount connector in that order. This printed circuit board card-edge connector is depicted in Figure 2. Serial Identification (EEPROM) The HFBR-5720L complies with an industry standard MSA that defines the serial identification protocol. This protocol uses the 2-wire serial CMOS E2PROM protocol of the ATMEL AT24C01A or equivalent. The Figure 1. Transceiver functional diagram. LIGHT FROM FIBER OPTICAL INTERFACE LIGHT TO FIBER PHOTO-DETECTOR RECEIVER AMPLIFICATION & QUANTIZATION RD+ (RECEIVE DATA) RD– (RECEIVE DATA) LOSS OF SIGNAL VCSEL TRANSMITTER LASER DRIVER & SAFETY CIRCUITRY Tx_DISABLE TD+ (TRANSMIT DATA) TD– (TRANSMIT DATA) Tx_FAULT ELECTRICAL INTERFACE MOD-DEF2 MOD-DEF1 MOD-DEF0 EEPROM HFBR-5720L BLOCK DIAGRAM |
Similar Part No. - HFBR-5720LP |
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Similar Description - HFBR-5720LP |
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