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IDT72V70840 Datasheet(PDF) 7 Page - Integrated Device Technology |
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IDT72V70840 Datasheet(HTML) 7 Page - Integrated Device Technology |
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7 / 21 page  7 COMMERCIALTEMPERATURERANGE IDT72V70840 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 4,096 x 4,096 TABLE 4 INTERNAL REGISTER AND ADDRESS MEMORY MAPPING A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 R/W Location 1 1 STA4 STA3 STA2 STA1 STA0 CH6 CH5 CH4 CH3 CH2 CH1 CH0 R Data Memory 1 0 STA4 STA3 STA2 STA1 STA0 CH6 CH5 CH4 CH3 CH2 CH1 CH0 R/W Connect. Memory 0 1 0 0 0 0 x x x x x x x x R/W Control Register 0 1 0 0 0 1 x x x x x x x x R/W Frame Align Register 0 1 0 0 1 0 x x x x x x x x R/W FOR0 0 1 0 0 1 1 x x x x x x x x R/W FOR1 0 1 0 1 0 0 x x x x x x x x R/W FOR2 0 1 0 1 0 1 x x x x x x x x R/W FOR3 0 1 0 1 1 0 x x x x x x x x R/W FOR4 0 1 0 1 1 1 x x x x x x x x R/W FOR5 0 1 1 0 0 0 x x x x x x x x R/W FOR6 0 1 1 0 0 1 x x x x x x x x R/W FOR7 OE bit in Connection ODE pin OSB bit in CR TX Stream Output Memory Register Status 0 Don’t Care Don’t Care Per Channel High-Impedance 1 0 0 High-Impedance 1 0 1 Enable 1 1 0 Enable 1 1 1 Enable TABLE 3 OUTPUT HIGH IMPEDANCE CONTROL TABLE 1 CONSTANT THROUGHPUT DELAY VALUE Delay for Constant Throughput Delay Mode Input Rate (m – output channel number) (n – input channel number) 2.048 Mb/s 32 + (32 – n) +m time-slots 4.096 Mb/s 64 + (64 – n) +m time-slots 8.192 Mb/s 128 + (128 – n) +m time-slots TABLE 2 VARIABLE THROUGHPUT DELAY VALUE Delay for Variable Throughput Delay Mode Input Rate (m – output channel number; n – input channel number) m < n m = n, n+1, n+2 m > n+2 2.048 Mb/s 32 – (n-m) time-slots (m-n + 32) time-slots (m-n)time-slots 4.096 Mb/s 64 – (n-m) time-slots (m-n + 64) time-slots (m-n)time-slots 8.192 Mb/s 128 – (n-m) time-slots (m-n + 128) time-slots (m-n)time-slots |
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