Electronic Components Datasheet Search |
|
CDC950DGGG4 Datasheet(PDF) 5 Page - Texas Instruments |
|
CDC950DGGG4 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 16 page CDC950 133MHz DIFFERENTIAL CLOCK SYNTHESIZER/DRIVER FOR PC MOTHERBOARDS/SERVERS SCAS646B − FEBRUARY 2001 − REVISED OCTOBER 2003 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Function Tables (Continued) Table 5. Host/HOST Output Buffer Specifications INPUT BOARD TARGET REFERENCE R, OUTPUT CURRENT VOH at Z MultSel0 MultSel1 BOARD TARGET TRACE/TERM Z REFERENCE R, IREF = VDD/(3 Rr) OUTPUT CURRENT IOH VOH at Z 0 0 60 Ω Rr = 475 1%, I_REF = 2.32 mA 5 × IREF 0.71 V at 60 Ω 0 0 50 Ω Rr = 475 1%, I_REF = 2.32 mA 5 × IREF 0.59 V at 50 Ω 0 1 60 Ω Rr = 475 1%, I_REF = 2.32 mA 6 × IREF 0.85 V at 60 Ω 0 1 50 Ω Rr = 475 1%, I_REF = 2.32 mA 6 × IREF 0.71 V at 50 Ω 1 0 60 Ω Rr = 475 1%, I_REF = 2.32 mA 4 × IREF 0.56 V at 60 Ω 1 0 50 Ω Rr = 475 1%, I_REF = 2.32 mA 4 × IREF 0.47 V at 50 Ω 1 1 60 Ω Rr = 475 1%, I_REF = 2.32 mA 7 × IREF 0.99 V at 60 Ω 1 1 50 Ω Rr = 475 1%, I_REF = 2.32 mA 7 × IREF 0.82 V at 50 Ω 0 0 30 (dc equivalent) Rr = 221 1%, I_REF = 5 mA 5 × IREF 0.75 V at 30 Ω 0 0 25 (dc equivalent) Rr = 221 1%, I_REF = 5 mA 5 × IREF 0.62 V at 25 Ω 0 1 30 (dc equivalent) Rr = 221 1%, I_REF = 5 mA 6 × IREF 0.90 V at 30 Ω 0 1 25 (dc equivalent) Rr = 221 1%, I_REF = 5 mA 6 × IREF 0.75 V at 25 Ω 1 0 30 (dc equivalent) Rr = 221 1%, I_REF = 5 mA 4 × IREF 0.60 V at 30 Ω 1 0 25 (dc equivalent) Rr = 221 1%, I_REF = 5 mA 4 × IREF 0.5 V at 25 Ω 1 1 30 (dc equivalent) Rr = 221 1%, I_REF = 5 mA 7 × IREF 1.05 V at 30 Ω 1 1 25 (dc equivalent) Rr = 221 1%, I_REF = 5 mA 7 × IREF 0.84 V at 25 Ω NOTE: The entries in boldface are the primary system configurations of interest. The outputs should be optimized for these configurations. absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Supply voltage range, VDD −0.5 V to 4.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage range, VI (see Note 1) –0.5 V to VDD + 0.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1) –0.5 V to VDD + 0.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Current into any output in the low state, IO 2 × rated IOL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input clamp current, IIK:(VI < 0) –50 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (VI > VDD) 50 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output clamp current, IOK:(VO < 0) –50 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VO > VDD) 50 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package thermal impedance, θJA (see Note 2) 89 °C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum power dissipation at TA = 55°C (in still air) (see Note 3) 1070 mW . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating free-air temperature range, TA –0 °C to 85°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range, Tstg –65 °C to 150°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for the through-hole packages, which use a trace length of zero. 3. The maximum package power dissipation is calculated using a junction temperature of 150 °C and a board trace length of 750 mils. For more information, refer to the Package Thermal Considerations application note in the ABT Advanced BiCMOS Technology Data Book, literature number SCBD002. |
Similar Part No. - CDC950DGGG4 |
|
Similar Description - CDC950DGGG4 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |