SN54LV174, SN74LV174

HEX D-TYPE FLIP-FLOPS

WITH CLEAR

SCLS192B – FEBRUARY 1993 – REVISED APRIL 1996

1

POST OFFICE BOX 655303

CMOS) 2-

µ Process

MIL-STD-883C, Method 3015; Exceeds

200 V Using Machine Model

(C = 200 pF, R = 0)

Per JEDEC Standard JESD-17

Small-Outline (D), Shrink Small-Outline

(DB), Thin Shrink Small-Outline (PW),

Ceramic Flat (W) Packages, Chip Carriers

(FK), and (J) 300-mil DIPs

description

These hex D-type flip-flops are designed for 2.7-V

The

’LV174

are

monolithic

positive-edge-

triggered flip-flops with a direct clear (CLR) input.

Information at the data (D) inputs meeting the

setup time requirements is transferred to the

outputs on the positive-going edge of the clock

pulse. Clock triggering occurs at a particular

voltage level and is not directly related to the transition time of the positive-going edge of the clock pulse. When

the clock (CLK) input is at either the high or low level, the D-input signal has no effect at the output.

The SN74LV174 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count

and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN54LV174 is characterized for operation over the full military temperature range of –55

°C to 125°C. The

SN74LV174 is characterized for operation from –40

°C to 85°C.

FUNCTION TABLE

INPUTS

OUTPUT

CLR

CLK

D

Q

L

X

X

L

H

↑

HH

H

↑

LL

H

L

X

Q0

Copyright

© 1996, Texas Instruments Incorporated

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

EPIC is a trademark of Texas Instruments Incorporated.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

SN54LV174 ...J OR W PACKAGE

SN74LV174 . . . D, DB, OR PW PACKAGE

(TOP VIEW)

32

1 20 19

910 11 12 13

4

5

6

7

8

18

17

16

15

14

6D

5D

NC

5Q

4D

1D

2D

NC

2Q

3D

SN54LV174 . . . FK PACKAGE

(TOP VIEW)

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

CLR

1Q

1D

2D

2Q

3D

3Q

GND

6Q

6D

5D

5Q

4D

4Q

CLK

NC – No internal connection