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TMP47P101 Datasheet(PDF) 10 Page - Toshiba Semiconductor |
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TMP47P101 Datasheet(HTML) 10 Page - Toshiba Semiconductor |
10 / 32 page 10/32 TOSHIBA CORPORATION TMP47C101/201 (5) Zero-page The 16 words (at addresses 00H through 0FH) of the zero page of the data memory can be used as the user flags or pointers by using zero-page addressing mode instructions (comparison, addition, transfer, and bit manipulation), providing enhanced efficiency in pro- gramming. Example: To write immediate data “8” to address 09H if bit 2 at address 04H in the RAM is “1”. TEST 04H,2 ; Skips if bit 2 at address 04H in the RAM is “0”. B SKIP ST #8, 09H ; Writes “8” to address 09H in the RAM SKIP: 2.4.2 Data Memory Capacity Figure 2-10. Data Memory Capacity and Address Assignment When power-on is performed, the contents of the RAM become unpredictable, so that they must be initialized by the initialization routine. Example: To clear RAM (use common to the 47C101 and 47C201) LD HL, #00H ; HL ←00H SCLRRAM: ST #0, @HL+ ; RAM [HL] ←0, LR LR + 1 B SCLRRAM ADD H, #1 ; HR ←HR + 1 B SCLRRAM 2.5 ALU and Accumulator 2.5.1 Arithmetic/Logic Unit (ALU) The ALU performs the arithmetic and logic operations speci- fied by instructions on 4-bit binary data and outputs the result of the operation, the carry information(C), and the zero detect information (z). (1) Carry information (C) The carry information indicates a carry-out from the most significant bit in an addition. A subtraction is per- formed as addition of two’s complement, so that, with a subtraction, the carry information indicates that there is no borrow to the most significant bit. With a rotate instruction, the information indicates the data to be shifted out from the accumulator. |
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