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Rev: 1.06 6/2000
6/15
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71116TP/J/U
AC Test Conditions
DQ
VT=1.4V
50
Ω
30pF1
DQ
3.3V
Output Load 1
Output Load 2
589
Ω
434
Ω
5pF1
Note:
1. Include scope and jig capacitance.
2. Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted
3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ.
Parameter
Conditions
Input high level
VIH=2.4V
Input low level
VIL=0.4V
Input rise time
tr=1V/ns
Input fall time
tf=1V/ns
Input reference level
1.4V
Output reference level
1.4V
Output load
Fig. 1& 2