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M74DW66500B Datasheet(PDF) 4 Page - STMicroelectronics

Part # M74DW66500B
Description  2x 64Mbit (x8/ x16, Multiple Bank, Boot Block) Flash Memory and 32Mbit Pseudo SRAM, 3V Supply, Multiple Memory Product
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M74DW66500B Datasheet(HTML) 4 Page - STMicroelectronics

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SUMMARY DESCRIPTION
The M74DW66500B is a low voltage Multiple
Memory Product which combines two memory de-
vices; a 64 Mbit Multiple Bank, Boot Block Flash
memory (M29DW640D) and a 32 Mbit Pseudo
SRAM. This document should be read in conjunc-
tion with the M29DW640D and M69AW048B
datasheets.
Recommended operating conditions do not allow
more than one of the internal memory devices to
be active at the same time.
The
memory
is
offered
in
an
LFBGA73
(8 x 11.6mm, 0.8 mm pitch) package and is sup-
plied with all the bits erased (set to ‘1’).
Figure 2. Logic Diagram
Table 1. Signal Names
AI08514
22
A0-A21
EF1
VCCF
M74DW66500B
G
VSS
W
RPF
E1P
E2P
UBP
LBP
VPP/WP
VCCP
DQ0-DQ14
15
DQ15A–1
RB
BYTE
EF2
A0-A20
Address Inputs common to the Flash
Memory and PSRAM Components
DQ0-DQ7
Data Inputs/Outputs
DQ8-DQ14
Data Inputs/Outputs
DQ15A–1
Data Input/Output or Address Input
G
Output Enable Input
W
Write Enable Input
VCCF
Flash Memory Power Supply
VPP/WP
VPP/Write Protect
VSS
Ground
VCCP
PSRAM Power Supply
NC
Not Connected Internally
Flash Memory Control Functions
A21
Address Input common to the two
Flash Memory Devices
EF1
Flash-1 Chip Enable Input
EF2
Flash-2 Chip Enable Input
RPF
Reset/Block Temporary Unprotect
RB
Ready/Busy Output
BYTE
Byte/Word Organization Select
PSRAM Control Functions
E1P, E2P
Chip Enable Inputs
UBP
Upper Byte Enable Input
LBP
Lower Byte Enable Input


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