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S83L51FA-8A44 Datasheet(PDF) 8 Page - NXP Semiconductors |
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S83L51FA-8A44 Datasheet(HTML) 8 Page - NXP Semiconductors |
8 / 16 page Philips Semiconductors Product specification 87L51FA/87L51FB CMOS single-chip 3.0V 8-bit microcontrollers 1996 Aug 16 3-157 DC ELECTRICAL CHARACTERISTICS Tamb = 0°C to +70°C, –40 to +85°C, VCC = 3.0V to 4.5V, VSS = 0V TEST LIMITS SYMBOL PARAMETER CONDITIONS MIN TYP1 MAX UNIT VIL Input low voltage, except EA2,3 –0.5 0.8 V VIL1 Input low voltage to EA2,3 0 0.8 V VIH Input high voltage, except XTAL1, RST2,4 2.0 VCC+0.5 V VIH1 Input high voltage, XTAL1, RST2,4 0.7VCC VCC+0.5 V VOL Output low voltage, ports 1, 2, 35 IOL = 1.6mA6 0.45 V VOL1 Output low voltage, port 0, ALE, PSEN5 IOL = 3.2mA6 0.45 V VOH Output high voltage, ports 1, 2, 3, ALE, PSEN7 IOH = –20µA VCC – 0.5 V VOH1 Output high voltage (port 0 in external bus mode), ALE8, PSEN7 IOH = –3.2mA VCC – 0.7 V IIL Logical 0 input current, ports 1, 2, 32 VIN = 0.4V –50 µA ITL Logical 1-to-0 transition current, ports 1, 2, 32 See note 9 –650 µA ILI Input leakage current, port 0 0.45 VIN < VCC – 0.3 ±10 µA ICC Power supply current:2 Active mode @ 20MHz10 Idle mode @ 20MHz Power-down mode See note 11 9 2 10 22 6 75 mA mA µA RRST Internal reset pull-down resistor 40 225 k Ω CIO Pin capacitance12 (except EA) 15 pF NOTES: 1. Typical ratings are not guaranteed. The values listed are at room temperature, 3.3V. 2. These values apply only to Tamb = 0°C to +70°C. 3. For VCC voltages above 3.6V and less than 5.5V, VIL = 0.3VCC – 0.1 4. For VCC voltages above 3.6V and less than 5.5V, VIH = 0.3VCC + 0.92 5. Under steady state (non-transient) conditions, IOL must be externally limited as follows: Maximum IOL per port pin: 15mA (*NOTE: This is 85 °C specification.) Maximum IOL per 8-bit port: 26mA Maximum total IOL for all outputs: 71mA If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test conditions. 6. Capacitive loading on ports 0 and 2 may cause spurious noise to be superimposed on the VOLs of ALE and ports 1 and 3. The noise is due to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1-to-0 transitions during bus operations. In the worst cases (capacitive loading > 100pF), the noise pulse on the ALE pin may exceed 0.8V. In such cases, it may be desirable to qualify ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input. IOL can exceed these conditions provided that no single output sinks more than 5mA and no more than two outputs exceed the test conditions. 7. Capacitive loading on ports 0 and 2 may cause the VOH on ALE and PSEN to momentarily fall below the 0.9VCC specification when the address bits are stabilizing. 8. ALE is tested to VOH1, except when ALE is off then VOH is the voltage specification. 9. Pins of ports 1, 2 and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its maximum value when VIN is approximately 1.5V. 10. ICCMAX at other frequencies is given by: Active mode: ICCMAX = 0.8 × FREQ + 6: Idle mode: ICCMAX = 0.19 × FREQ +2.50, where FREQ is the external oscillator frequency in MHz. ICCMAX is given in mA. See Figure 8. 11. See Figures 9 through 12 for ICC test conditions. 12. Pin capacitance is less than 25pF. Pin capacitance of ceramic package is less than 15pF (except EA is 25pF). These values are guaranteed by design and are not tested. |
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