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BD86852MUF-C Datasheet(PDF) 37 Page - Rohm |
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BD86852MUF-C Datasheet(HTML) 37 Page - Rohm |
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37 / 46 page  37/43 TSZ02201-0A3A0AP00520-1-2 © 2020 ROHM Co., Ltd. All rights reserved. 03.Mar.2020 Rev.001 www.rohm.com TSZ22111 • 15 • 001 BD86852MUF-C Power Loss Use good margin to keep the Ta and Tj operating range in the thermal design below. Do not exceed the temperature specification of Ta and Tj at any time by design. 1. Ambient temperature Ta < 125 °C 2. Chip junction temperature Tj < 150 °C Chip junction temperature Tj can be estimated by the following two ways. I. Estimate Tj based on the package top center temperature Tt in actual usage. �������� = �������� + ������������ × ���� II. Estimate Tj based on the ambient temperature Ta. �������� = �������� + ������������ × ���� Power dissipation W of the IC is calculated by the following equation. ���� = ������������ × ������������ + ����1 + ����2 + ����3 Where: ICC is circuit current. VCC is input voltage. W1 is power dissipation of DC/DC1. W2 is power dissipation of DC/DC2. W3 is power dissipation of DC/DC3. Power loss of DC/DC W1 to W3 I. Loss of Tr 1 2 �������� × �������� × �������� × ���������������� II. Loss of High Side FET ON resistance ���������������� × ��������2 × �������� ��������� III. Loss of Tf 1 2 �������� × �������� × �������� × ���������������� IV. Loss of body diode �������� × �������� × 2 × ���������������� × ���������������� (When using external SBD, loss will not be included in IC.) V. Loss of Low Side FET ON resistance ���������������� × ��������2 × ( ��������−�������� �������� − 2 × ���������������� × ����������������) Where: VS is input voltage. VO is output voltage. IO is output current. Tr/Tf is the rising/falling time of the switching voltage transition. Freq is oscillation frequency. RONH is RON of high side FET. RONL is RON of low side FET. VF is body diode of low side FET. tOFF is dead time. Figure 34. Power Loss of DC/DC GND VS Ⅱ Ⅴ Ⅰ Ⅲ Ⅳ Ⅳ SW wave form |
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