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Z86E0412SEC Datasheet(PDF) 10 Page - Zilog, Inc. |
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Z86E0412SEC Datasheet(HTML) 10 Page - Zilog, Inc. |
10 / 38 page Z86E02/E04/E08/E09 SL1995 Z8 CMOS OTP Microcontrollers PS009201-0301 Programming Specification 5 OTP Memory Size The device is offered in 4 memory configurations. Table 3 lists the available sizes of EPROM memory. Device Operation The device must first be unlocked before it can enter EPROM mode. Otherwise, the device remains in STANDARD mode. The device cannot be programmed in STANDARD mode. It can only be programmed in EPROM mode. The following sequence details the unlock procedure. Unlock Sequence into EPROM Mode The following unlock sequence is valid for all parts. Unlock clock cycles are the XIN clock cycle entered by the programmer, not the internal Z8 SCLK cycles. 1. A POR must be completed before unlock operations begin. The XIN pin must be in a VIL state. Allow 50 ms minimum for the device to completely exit POR to allow the internal signal IRESET to go Low. See Table 5 for POR conditions. 2. Any time after POR, when the internal signal IRESET is Low. The unlock sequence can be sent. See Figure 6 and Table 4. 3. While the XIN pin is in a VIL state, force Port 2 pins with A5h. 4. Apply one clock pulse to XIN. The clock pulses should be a minimum of 1µsec in duration. 5. Force the Port 2 pins with 5Ah. 6. Apply one clock pulse to the XIN pin. 7. Force the Port 2 pins with A5h. Table 3. EPROM Size Devices Memory Size Last Address Z86E02 0.5 KB 01FFh Z86E04 1.0 KB 03FFh Z86E08 2.0 KB 07FFh Z86E09 4.0 KB 0FFFh Note: |
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