ZXLD1101

SEMICO NDUC TORS

ISSUE 4 - JULY 2004

3

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Input voltage

2.5

5.5

V

Supply current

Quiescent

Shutdown

Output not switching

60

100

500

A

nA

FB pin control voltage

90.5

109.5

mV

FB pin input current

100

nA

Operating frequency

0.35

1

MHz

LX output 'OFF' time

350

500

ns

LX output 'ON' time

(2)

5µs

Switch peak current limit

320

mA

Switch 'On' resistance

1.5

Switch leakage current

1

µA

Controller output voltage

Normal operation

28

V

EN pin High level Input voltage

Device active

1.5

V

IN

V

EN pin Low level Input voltage

Device in shutdown

0.4

V

EN pin Low level input current

-100

nA

EN pin High level input current

1

A

EN pin turn off delay

(3)

to low

120

µs

∆T/T

PWM duty cycle range at ‘EN’ input for

filtered PWM control

(4)

10kHz < f < 100kHz,

20

100

%

Internal PWM low pass filter cut-off

frequency

4

kHz

Filter attenuation

f=30kHz

52.5

dB

∆T/T

PWM duty cycle range at ‘EN’ input for

‘gated’ output current control

(5)

0

100

%

NOTES:

(1) Production testing of the device is performed at 25°C. Functional operation of the device over a -40°C to +85°C temperature range is

guaranteed by design, characterisation and process control.

(3) This is the time for which the device remains active after the EN pin has been asserted low. This delay is necessary to allow the output to be

maintained during dc PWM mode operation.

(4) The minimum PWM signal frequency during this mode of operation is to ensure that the device remains active during PWM control. This

provides a continuous dc output current. For lower frequencies, the device will be gated 'on' and 'off' during PWM control.

(5) The maximum PWM signal frequency during this mode of operation should be kept as low as possible to minimise errors due to the turn-off

delay of the device (see Enable pin turn-off delay).