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ADIS16489 Datasheet(PDF) 5 Page - Analog Devices |
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ADIS16489 Datasheet(HTML) 5 Page - Analog Devices |
5 / 40 page ![]() Data Sheet ADIS16489 Rev. B | Page 5 of 40 Parameter Test Conditions/Comments Min Typ Max Unit TEMPERATURE SENSOR Scale Factor Output = 0x0000 at 25°C (±5°C) 0.00565 °C/LSB LOGIC INPUTS7 Input Voltage High, VIH 2.0 V Low, VIL 0.8 V RST Pulse Width 1 µs CS Wake-Up Pulse Width 20 µs Input Current Logic 1 (High), IIH VIH = 3.3 V 10 µA Logic 0 (Low), IIL VIL = 0 V All Pins Except RST 10 µA RST Pin 0.33 mA Input Capacitance, CIN 10 pF DIGITAL OUTPUTS Output Voltage High, VOH ISOURCE = 0.5 mA 2.4 V Low, VOL ISINK = 2.0 mA 0.4 V FLASH MEMORY Endurance8 100,000 Cycles Data Retention9 TJ = 85°C 20 Years FUNCTIONAL TIMES10 Time until data is available Power-On Start-Up Time 600 ms Back-up 1370 1500 ms Reset Recovery Time11 390 600 ms Sleep Mode Recovery Time 730 1000 µs Flash Memory Update Time12 1.05 6.8 sec Test Time 50 ms On Demand Self Test Time Using internal clock (2460 Hz) 12 ms CONVERSION RATE 2.46 kSPS Initial Clock Accuracy 0.02 % Temperature Coefficient 40 ppm/°C Sync Input Clock13 0.7 2.4 kHz POWER SUPPLY, VDD Operating voltage range, VDD = 3.3 V 3.0 3.6 V Power Supply Current, IDD14 Normal mode, µ ± σ 186 mA Sleep mode 12.2 mA Power-down mode 37 µA POWER SUPPLY, VDDRTC Operating voltage range 3.0 3.3 3.6 V Real-Time Clock Supply Current Normal mode, VDDRTC = 3.3 V 13 µA 1 The repeatability specifications represent analytical projections based on the following drift contributions and conditions: temperature hysteresis (−40°C to +85°C), electronics drift (high temperature operating life test: 110°C, 500 hours), drift from temperature cycling (JESD22, Method A104-C, Method N, 500 cycles, −55°C to +85°C), rate random walk (10-year projection), and broadband noise. 2 Bias repeatability describes a long-term behavior over a variety of conditions. Short-term repeatability relates to the in-run bias stability and noise density specifications. 3 All specifications associated with the accelerometers relate to the full-scale range of ±18 g. 4 X-ray exposure can degrade this performance metric. 5 The relative error assumes that the initial error, at 25°C, is corrected in the end application. 6 Specification assumes a full scale (FS) of 1000 mbar. 7 The digital I/O signals use a 3.3 V system. 8 Endurance is qualified as per JEDEC Standard 22, Method A117, measured at −40°C, +25°C, +85°C, and +125°C. 9 The data retention specification assumes a junction temperature (TJ) of 85°C per JEDEC Standard 22, Method A117. Data retention lifetime decreases with TJ. 10 These times do not include thermal settling and internal filter response times, which may affect overall accuracy. 11 The RST line must be in a low state for at least 10 μs to ensure a proper reset initiation and recovery. 12 Monitoring the data ready signal (see Table 153 for FNCTIO_CTRL configuration) for the return of regular pulsing can help minimize system wait times. 13 The device functions at clock rates below 0.7 kHz but at reduced performance levels. 14 Supply current transients can reach 600 mA during initial startup or reset recovery. |
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