PRELIMINARY
Page 1 of 13
Specifications subject to change without notice. U.S. Patent No. 6,822,321
Rev. 3
http://www.cree.com/
PFM18030 SPECIFICATION
18051880 MHz, 30W, 2Stage Power Module
EnhancementMode Lateral MOSFETs
This versatile DCS module provides excellent linearity and efficiency in a
lowcost surface mount package. The PFM18030SM includes two stages
of amplification, along with internal sense FETs that are on the same
silicon die as the RF devices. These thermally coupled sense FETs
simplify the task of bias temperature compensation of the overall amplifier.
The module includes RF input, interstage, and output matching elements.
The source and load impedances required for optimum operation of the
module are much higher (and simpler to realize) than for unmatched Si
LDMOS transistors of similar performance.
The surface mount package base is typically soldered to a conventional
PCB pad with an array of via holes for grounding and thermal sinking of
the module. Optimized internal construction supports low FET channel
temperature for reliable operation.
· 29 dB Gain
· 30 Watts Peak Output Power
· Internal Tracking FETs
(for improved bias control)
· IS95 CDMA Performance
5 Watts Average Output Level
20% Power Added Efficiency
–49 dBc ACPR
Module Schematic Diagram
Note: Additionally, there are 250 KOhm resistors connected in shunt with all leads, to enhance ESD protection.
Gate 1
RF IN
Sense S1
Gate 2
Sense S2
D1
Drain 2
RF OUT
Lead
Lead
Lead
Lead
Lead
Lead
Q1
Input
Match
Q2
Input
Match
Output
Match
S1
Q1 Die Carrier
Q2 Die Carrier
Module Substrate
S2
Output
Match
Package Type: Surface Mount
PN: PFM18030SM
Package Type: Flange
PN: PFM18030F