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AFL2703R3SY-HB Datasheet(PDF) 5 Page - International Rectifier |
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AFL2703R3SY-HB Datasheet(HTML) 5 Page - International Rectifier |
5 / 11 page www.irf.com 5 AFL50XXS Series AFL50XXS Circuit Description Figure I. AFL Single Output Block Diagram Figure II. Enable Input Equivalent Circuit Circuit Operation and Application Information Inhibiting Converter Output As an alternative to application and removal of the DC volt- age to the input, the user can control the converter output by providing TTL compatible, positive logic signals to either of two enable pins (pin 4 or 12). The distinction between these two signal ports is that enable 1 (pin 4) is referenced to the input return (pin 2) while enable 2 (pin 12) is refer- enced to the output return (pin 8). Thus, the user has access to an inhibit function on either side of the isolation barrier. Each port is internally pulled “high” so that when not used, an open connection on both enable pins permits nor- mal converter operation. When their use is desired, a logi- cal “low” on either port will shut the converter down. 1 DC Input Enable 1 4 Sync Output 5 6 Sync Input Case 3 2 Input Return Input Filter Primary Bias Supply Control FB Output Filter Current Sense Error Amp & Ref Share Amplifier Sense Amplifier 7 +Output 10 +Sense 11 Share 12 Enable 2 9 -Sense 8 Output Return The AFL series of converters employ a forward switched mode converter topology. (refer to Figure I.) Operation of the device is initiated when a DC voltage whose magnitude is within the specified input limits is applied between pins 1 and 2. If pin 4 is enabled (at a logical 1 or open) the primary bias supply will begin generating a regulated housekeeping voltage bringing the circuitry on the primary side of the converter to life. A power MOSFET is used to chop the DC input voltage into a high frequency square wave, applying this chopped voltage to the power transformer at the nomi- nal converter switching frequency. Maintaining a DC volt- age within the specified operating range at the input as- sures continuous generation of the primary bias voltage. The switched voltage impressed on the secondary output transformer winding is rectified and filtered to generate the converter DC output voltage. An error amplifier on the sec- ondary side compares the output voltage to a precision reference and generates an error signal proportional to the difference. This error signal is magnetically coupled through the feedback transformer into the controller section of the converter varying the pulse width of the square wave signal driving the MOSFET, narrowing the width if the output volt- age is too high and widening it if it is too low, thereby regulat- ing the output voltage. Remote Sensing Connection of the + and - sense leads at a remotely located load permits compensation for excessive resistance be- tween the converter output and the load when their physical separation could cause undesirable voltage drop. This con- nection allows regulation to the placard voltage at the point of application. When the remote sensing feature is not used, the sense lead should be connected to their respective output terminals at the converter. Figure III. illustrates a typical remotely sensed application. D isable 100K 290K 180K 1N 4 148 2N 3 904 +5.6 V P in 4 o r P in 12 P in 2 o r Pin 8 |
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