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TMS417400A-60DJ Datasheet(PDF) 10 Page - Texas Instruments |
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TMS417400A-60DJ Datasheet(HTML) 10 Page - Texas Instruments |
10 / 27 page TMS416400A, TMS417400A 4194304 BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORIES SMKS889B – AUGUST 1996 – REVISED OCTOBER 1997 10 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 electrical characteristics over recommended ranges of supply voltage and ambient temperature (unless otherwise noted) (continued) TMS417400A PARAMETER TEST CONDITIONS† ’417400A - 50 ’417400A - 60 ’417400A - 70 UNIT PARAMETER TEST CONDITIONS† MIN MAX MIN MAX MIN MAX UNIT VOH High-level output voltage IOH = – 5 mA 2.4 2.4 2.4 V VOL Low-level output voltage IOL = 4.2 mA 0.4 0.4 0.4 V II Input current (leakage) VCC = 5.5 V, VI = 0 V to 6.5 V, All others = 0 V to VCC ± 10 ± 10 ± 10 µA IO Output current (leakage) VCC = 5.5 V, VO = 0 V to VCC, CAS high ± 10 ± 10 ± 10 µA ICC1‡§ Average read- or write-cycle current VCC = 5.5 V, Minimum cycle 130 110 100 mA ICC2 Average standby VIH = 2.4 V ( TTL), After one memory cycle, RAS and CAS high 2 2 2 mA ICC2 gy current VIH = VCC – 0.2 V (CMOS), After one memory cycle, RAS and CAS high 1 1 1 mA ICC3‡§ Average refresh current (RAS-only refresh or CBR) VCC = 5.5 V, Minimum cycle, RAS cycling, CAS high (RAS only), RAS low after CAS low (CBR) 130 110 100 mA ICC4‡¶ Average page current VCC = 5.5 V, tPC = MIN, RAS low, CAS cycling 90 70 60 mA † For conditions shown as MIN / MAX, use the appropriate value specified in the timing requirements. ‡ Measured with outputs open § Measured with a maximum of one address change while RAS = VIL ¶ Measured with a maximum of one address change during each page-mode cycle, tPC. |
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