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ICS83026I Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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ICS83026I Datasheet(HTML) 1 Page - Integrated Circuit Systems |
1 / 11 page 83026AMI www.icst.com/products/hiperclocks.html REV. B NOVEMBER 9, 2004 1 Integrated Circuit Systems, Inc. ICS83026I LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER GENERAL DESCRIPTION The ICS830 26I is a low skew, 1-to- 2 Differ- ential-to-LVCMOS/LVTTL Fanout Buffer and a member of the HiPerClockS™family of High Perfor mance Clock Solutions from ICS.The differential input can accept most differential sig- nal types (LVDS, LVHSTL, LVPECL, SSTL, and HCSL) and translate to two single-ended LVCMOS/LVTTL outputs with a maximum output skew of 20ps. The small 8-lead SOIC foot- print makes this device ideal for use in applications with lim- ited board space. FEATURES • 2 LVCMOS / LVTTL outputs • Differential CLK, nCLK input pair • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Output frequency: 350MHz (typical) • Output skew: 20ps (maximum) • Part-to-part skew: 600ps (maximum) • Small 8 lead SOIC package saves board space • 3.3V operating supply • -40°C to 85°C ambient operating temperature • Lead-Free package available • Pin-to-pin compatible with MC100EPT26 BLOCK DIAGRAM PIN ASSIGNMENT ICS83026I 8-Lead SOIC 3.8mm x 4.8mm, x 1.47mm package body M Package Top View nc CLK nCLK nc 1 2 3 4 Q0 Q1 CLK nCLK HiPerClockS™ ICS VDD Q0 Q1 GND 8 7 6 5 |
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