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56F8335 Datasheet(PDF) 11 Page - Freescale Semiconductor, Inc |
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56F8335 Datasheet(HTML) 11 Page - Freescale Semiconductor, Inc |
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11 / 160 page  Architecture Block Diagram 56F8335 Technical Data, Rev. 1 Freescale Semiconductor 11 Preliminary Figure 1-2 Peripheral Subsystem Timer A Timer C Timer D SPI1 ADCB ADCA FlexCAN GPIOA SPI0 SCI0 SCI1 Interrupt Controller To/From IPBus Bridge PWMA PWMB Quadrature Decoder 0 Note: ADC A and ADC B use the same voltage reference circuit with VREFH, VREFP, VREFMID, VREFN, and VREFLO pins. GPIOB GPIOC GPIOD GPIOE GPIOF Timer B Quadrature Decoder 1 TEMP_SENSE NOT available on the 56F8135 device. Low-Voltage Interrupt System POR COP Reset RESET POR & LVI SIM COP 2 13 13 CLKGEN (OSC / PLL) 4 4 4 SYNC Output SYNC Output 2 ch3i ch2i ch3o ch2o 8 8 1 2 2 4 IPBus |
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Similar Description - 56F8335 |
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