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FDM2509NZ Datasheet(HTML) 2 Page - Fairchild Semiconductor

Part No. FDM2509NZ
Description  Monolithic Common Drain N-Channel 2.5V Specified PowerTrench MOSFET
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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FDM2509NZ Datasheet(HTML) 2 Page - Fairchild Semiconductor

   
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FDM2509NZ Rev C2
Electrical Characteristics
T
A = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ Max Units
Off Characteristics
BVDSS
Drain–Source Breakdown
Voltage
VGS = 0 V,
ID = 250 µA
20
V
∆BVDSS
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, Referenced to 25°C
12
mV/
°C
IDSS
Zero Gate Voltage Drain Current
VDS = 16 V,
VGS = 0 V
1
µA
IGSS
Gate–Body Leakage,
VGS = ±12 V,
VDS = 0 V
±10
µA
On Characteristics
(Note 2)
VGS(th)
Gate Threshold Voltage
VDS = VGS,
ID = 250 µA
0.6
0.9
1.5
V
∆VGS(th)
∆TJ
Gate Threshold Voltage
Temperature Coefficient
ID = 250 µA, Referenced to 25 C
–3
mV/
°C
RDS(on)
Static Drain–Source
On–Resistance
VGS = 4.5 V,
ID = 8.7 A
VGS = 4.0 V,
ID = 8.5 A
VGS = 3.1 V,
ID = 8.1 A
VGS = 2.5 V,
ID = 7.6 A
VGS = 4.5 V, ID = 8.7 A, TJ = 125°C
13
13.5
15.5
18
18.4
18
19
21
24
25
m
gFS
Forward Transconductance
VDS = 5 V,
ID = 8.7 A
36
S
Dynamic Characteristics
Ciss
Input Capacitance
1200
pF
Coss
Output Capacitance
320
pF
Crss
Reverse Transfer Capacitance
VDS = 10 V,
V GS = 0 V,
f = 1.0 MHz
185
pF
RG
Gate Resistance
V GS = 50mV,
f = 1.0 MHz
2
Switching Characteristics (Note 2)
td(on)
Turn–On Delay Time
11
20
ns
tr
Turn–On Rise Time
15
27
ns
td(off)
Turn–Off Delay Time
27
43
ns
tf
Turn–Off Fall Time
VDD = 10 V,
ID = 1 A,
VGS = 4.5 V,
RGEN = 6 Ω
12
22
ns
Qg
Total Gate Charge
12
17
nC
Qgs
Gate–Source Charge
2
nC
Qgd
Gate–Drain Charge
VDS = 10 V,
ID = 8.7 A,
VGS = 4.5 V
4
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
1.8
A
VSD
Drain–Source Diode Forward
Voltage
VGS = 0 V,
IS = 1.8 A
(Note 2)
0.7
1.2
V
trr
Diode Reverse Recovery Time
20
nS
Qrr
Diode Reverse Recovery Charge
IF = 8.7 A,
dIF/dt = 100 A/µs
6.4
nC
Notes:
1. R
θJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θJC is guaranteed by design while RθCA is determined by the user's board design.
a)
55°C/W when
mounted on a 1in
2 pad
of 2 oz copper
Scale 1 : 1 on letter size
paper
b)
145°C/W when mounted on a
minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300
µs,
Duty Cycle < 2.0%
3. The diode connected between the
gate and the source serves only
as protection against ESD. No
gate overvoltage rating is
implied.


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