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FDMW2512NZ Datasheet(HTML) 2 Page - Fairchild Semiconductor

Part No. FDMW2512NZ
Description  Monolithic Common Drain N-Channel 2.5V Specified PowerTrench MOSFET
Download  6 Pages
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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FDMW2512NZ Datasheet(HTML) 2 Page - Fairchild Semiconductor

   
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FDMW2512NZ Rev D
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ Max
Units
Off Characteristics
BVDSS
Drain–Source Breakdown
Voltage
VGS = 0 V,
ID = 250 µA
20
V
∆BVDSS
∆T
J
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, Referenced to 25°C
12
mV/
°C
IDSS
Zero Gate Voltage Drain Current
VDS = 16 V,
VGS = 0 V
1
µA
IGSS
Gate–Body Leakage,
VGS = ±12 V,
VDS = 0 V
±10
µA
On Characteristics
(Note 2)
VGS(th)
Gate Threshold Voltage
VDS = VGS,
ID = 250 µA
0.5
0.8
1.5
V
∆V
GS(th)
∆T
J
Gate Threshold Voltage
Temperature Coefficient
ID = 250 µA, Referenced to 25 C
–3
mV/
°C
RDS(on)
Static Drain–Source
On–Resistance
VGS = 4.5 V,
ID = 7.2 A
VGS = 4.0 V,
ID = 7.2 A
VGS = 3.1 V,
ID = 6.4 A
VGS = 2.5 V,
ID = 6.4 A
VGS = 4.5 V, ID = 7.2 A, TJ=125°C
19
20
22
23
25
26
28
32
34
39
m
gFS
Forward Transconductance
VDS = 5 V,
ID =7.2 A
30
S
Dynamic Characteristics
Ciss
Input Capacitance
740
pF
Coss
Output Capacitance
165
pF
Crss
Reverse Transfer Capacitance
VDS = 15 V,
V GS = 0 V,
f = 1.0 MHz
127
pF
RG
Gate Resistance
f = 1.0 MHz
1.4
Switching Characteristics (Note 2)
td(on)
Turn–On Delay Time
8
16
ns
tr
Turn–On Rise Time
10
20
ns
td(off)
Turn–Off Delay Time
16
29
ns
tf
Turn–Off Fall Time
VDD = 10 V,
ID = 1 A,
VGS = 4.5 V,
RGEN = 6 Ω
13
23
ns
Qg
Total Gate Charge
9
13
nC
Qgs
Gate–Source Charge
1
nC
Qgd
Gate–Drain Charge
VDS = 10 V,
ID = 7.2 A,
VGS = 4.5 V
3
nC
Drain–Source Diode Characteristics
VSD
Drain–Source Diode Forward
Voltage
VGS = 0 V,
IS = 1.8 A
(Note 2)
0.7
1.2
V
trr
Diode Reverse Recovery Time
15
nS
Qrr
Diode Reverse Recovery Charge
IF = 7.2 A,
dIF/dt = 100 A/µs
4
nC
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a)
55°C/W when
mounted on a 1in
2 pad
of 2 oz copper
b) 145°C/W when mounted on a
minimum pad of 2 oz copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300
µs,
Duty Cycle < 2.0%
3. The diode connected between the gate
and source serves only as protection
againts ESD. No gate overvoltage
rating is implied.


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