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K9F5608D0C Datasheet(PDF) 1 Page - Samsung semiconductor

Part # K9F5608D0C
Description  32M x 8 Bit 16M x 16 Bit NAND Flash Memory
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Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

K9F5608D0C Datasheet(HTML) 1 Page - Samsung semiconductor

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FLASH MEMORY
1
K9F5608D0C
K9F5608Q0C
K9F5608U0C
K9F5616D0C
K9F5616Q0C
K9F5616U0C
Document Title
32M x 8 Bit , 16M x 16 Bit NAND Flash Memory
Revision History
The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right
to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have
any questions, please contact the SAMSUNG branch office near you.
Revision No.
0.0
1.0
2.0
2.1
2.2
2.3
2.4
2.5
Remark
Advance
Preliminary
Preliminary
Preliminary
History
Initial issue.
1.Pin assignment of TBGA dummy ball is changed.
(before) DNU --> (after) N.C
2. Add the Rp vs tr ,tf & Rp vs ibusy graph for 1.8V device (Page 36)
3. Add the data protection Vcc guidence for 1.8V device - below about
1.1V. (Page 37)
4. Add the specification of Block Lock scheme.(Page 32~35)
5. Pin assignment of TBGA A3 ball is changed.
(before) N.C --> (after) Vss
6. Pin assignment of WSOP #38 pin is changed.
(before) LOCKPRE --> (after) N.C
1. The Maximum operating current is changed.
Program : Icc2 20mA-->25mA
Erase : Icc3 20mA-->25mA
The min. Vcc value 1.8V devices is changed.
K9F56XXQ0C : Vcc 1.65V~1.95V --> 1.70V~1.95V
Pb-free Package is added.
K9F5608U0C-FCB0,FIB0
K9F5608Q0C-HCB0,HIB0
K9F5616U0C-HCB0,HIB0
K9F5616U0C-PCB0,PIB0
K9F5616Q0C-HCB0,HIB0
K9F5608U0C-HCB0,HIB0
K9F5608U0C-PCB0,PIB0
Errata is added.(Front Page)-K9F56XXQ0C
tWC tWH tWP tRC tREH tRP tREA tCEA
Specification
45
15
25
50
15
25
30
45
Relaxed value
60
20
40
60
20
40
40
55
New definition of the number of invalid blocks is added.
(Minimum 1004 valid blocks are guaranteed for each contiguous 128Mb
memory space.)
1. The guidence of LOCKPRE pin usage is changed.
Don’t leave it N.C. Not using LOCK MECHANISM & POWER-ON AUTO-
READ, connect it Vss.(Before)
--> Not using LOCK MECHANISM & POWER-ON AUTO-READ, connect
it Vss or leave it N.C(After)
2. 2.65V device is added.
3.Note is added.
(VIL can undershoot to -0.4V and VIH can overshoot to VCC +0.4V for
durations of 20 ns or less.)
Draft Date
Apr. 25th 2002
Dec.14th 2002
Jan. 17th 2003
Mar. 5th 2003
Mar. 13rd 2003
Mar. 26th 2003
Apr. 4th 2003
Jun. 30th 2003
Note : For more detailed features and specifications including FAQ, please refer to Samsung’s Flash web site.
http://www.samsung.com/Products/Semiconductor/Flash/TechnicalInfo/datasheets.htm


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