ASAHI KASEI

[AK6480C/81]

DAS04E-00

2005/03

- 4 -

Pin Description

When SK is high level and CS is changed from high level to low level, AK6480C/81C can

receive the instructions.

CS should be kept low level while receiving op-code, address and

data and while outputting data.

If

CS

is changed to high level during the above period,

AK6480C/81C stops the instruction execution.

When SK is low and CS is changed from

high level to low level, AK6480C/81C will be in status output mode. The CS need not be low

level during the automatic write time-out period ( Busy status).

The SK clock pin is the synchronous clock input for input/output data.

At write operation,

AK6480C/81C takes in the write data from data input pin (DI) synchronously with rising edge of

input pulse of serial clock pin ( SK ).

And at read operation, AK6480C/81C takes out the read

data to data output pin (DO) synchronously with falling edge of SK .

The SK clock is not

needed during the automatic write time-out period ( Busy status), the status output period and

when the device isn't selected ( CS = high level).

The op-code, address and write data is input to the DI pin.

The DO pin outputs the read data and status signal and will be high impedance except for this

timing.

This pin outputs the internal programming status.

When the AK6480C/81C is in the automatic

write time-out period, this pin outputs the low level ( Busy status), and outputs the high level

except for this timing.

The AK6480C/81C stops executing the write instruction when the RESET pin is high level.

The

RESET pin should be low level while the write instruction input period and the page write

instruction input period and the automatic write time-out period.

If the RESET pin is high level

while the automatic write time-out period, the AK6480C/81C stops execution of internal

programming and the device returns to ready status.

In this case the word data of the specified

address will be incomplete.

When inputting the new instruction after RESET, the

CS

pin

should be set to high level.

The read, write enable and write disable instructions are not affected

by RESET pin status.