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AK8813VQ Datasheet(PDF) 6 Page - Asahi Kasei Microsystems |
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AK8813VQ Datasheet(HTML) 6 Page - Asahi Kasei Microsystems |
6 / 51 page ASAHIKASEI [AK8813/14] Rev.00 - 7 - 2004/Oct 57pin FBGA No. Pin Name I/O Description A1 NC - Open for normal operation B1 AVSS G Analog Ground C1 AVDD P Analog Power Supply C2 VREFOUT O Output of the Internal Vref. Terminate with 0.1uF or more capacitor. D1 VREFIN I Input of the Reference Voltage D2 IREF O The currents flow this pin adjusts the full-scale output current of the DAC. Connect this pin to Analog ground via a 6.8kohm resistor ( better than +/- 1% accuracy ). E1 DVSS G Digital Ground E2 DVDD P Digital Power Supply F2 UD0 I/O Test pin. Open for normal operation F1 UD1 I/O Test pin. Open for normal operation G2 UD2 I/O Test pin. Open for normal operation G1 UD3 I/O Test pin. Open for normal operation H1 UD4 I/O Test pin. Open for normal operation J1 NC - Open for normal operation J2 UD5 I/O Test pin. Open for normal operation H2 UD6 I/O Test pin. Open for normal operation H3 UD7 I/O Test pin. Open for normal operation J3 DVSS G Digital Ground H4 SYSCLK I 27MHz Clock Input. The polarity could be inverted by SYSINV. J4 DVDD P Digital Power Supply H5 UD8 I/O Test pin. Open for normal operation J5 DVDD P Digital Power Supply J6 FID/VSYNC I/O Either of FID or VSYNC selected by the register. Rec.656 decode mode :Output Master mode : Output Slave mode : Input FID shows that “L” is odd field and ”H” is even field. H6 HSYNC I/O Rec.656 decode mode : Output Master mode : Output Slave mode : Input H7 DVSS G Digital Ground J7 SYSINV I “L “ : data is latched with rising edge. “H” : data is latched with falling edge. H8 UD9 I/O Test pin. Open for normal operation J9 NC - Open for normal operation J8 D7 I Video data input (MSB) G8 D6 I Video data input |
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