Electronic Components Datasheet Search |
|
M64898GP Datasheet(PDF) 2 Page - Mitsubishi Electric Semiconductor |
|
M64898GP Datasheet(HTML) 2 Page - Mitsubishi Electric Semiconductor |
2 / 8 page MITSUBISHI ICs (TV) M64898GP PLL FREQUENCY SYNTHESIZER WITH DC-DC CONVERTER FOR PC 2 DESCRIPTION OF PIN ABSOLUTE MAXIMUM RATINGS (Ta=-20 °C to +75°C, unless otherwise noted) Pin No. Symbol Pin name Function 1 f in Prescaler input Input for the VCO frequency. 2 GND GND Ground to 0V. 3VCC1 Power supply voltage 1 Power supply voltage terminal. 5.0V ±0.5V 4VCC2 Power supply voltage 2 Power supply for band switching, Vcc1 to 10V 5 BS4 Band switching outputs PNP open collector method is used. When the band switching data is "H", the output is ON. When it is "L", the output is OFF. 6 BS3 7 BS2 8 BS1 9 VDC DC-DC power supply voltage DC-DC power supply voltage terminal. 5.0V ±0.5V 10 Ipk Peack current detect When potential difference with VDC terminal becomes more than 0.33V by current limiting detector of DC-DC converter, the listing rises with off. 11 SWE Switching output DC-DC converter oscillator output. 12 +B Power supply voltage Power supply voltage for turning voltage. 13 Vtu Tuning output This supplies the tuning voltage. Vin Filter input (Charge pump output) This is the output terminal for the LPF input and charge pump output. When the phase of the programmable divider output (f 1/N) is ahead compared to the reference frequency (fREF), the "source" current state becomes active. If it is behind, the "sink" current becomes active. If the phases are the same, the high impedance state becomes active. 14 15 LD/ftest Lock detect /Test port Lock detector output. When loop of phase locked loop locked it, it rises with "H" level in "L" level or unlock. In control byte data input, the programmabule freq. divider output and reference freq. output is selected by the test mode. 16 CONT fREF Switchi Set up reference frequency divider ratio. In "L" level, set it up in 1/640(19Bit) in setting "opening" in 1/1024(19Bit) or 1/512 (18Bit). 17 CLOCK Clock input Data is read into the shift register when the clock signal falls. 18 DATA Data input Input for band SW and programmable freq. divider set up. 19 ENABLE Enable input This is normally at a "L". When this is at "H", data and clock signals are received. Data is read into the latch when the enable signal after the 18th signal of the clock signal falls or when the 19th pulse of the clock signal falls. 20 X in This is connected to the crystal oscillator. 4.0MHz crystal oscillator is connected. Symbol Parameter Conditions Ratings Unit VCC1 Supply voltage 1 Pin3 6.0 V VCC2 Supply voltage 2 Pin4 10.8 V VI Input voltage Not to exceed Vcc1 6.0 V VO Output voltage fREF output 6.0 V VBSOFF Voltage applied when the band output is OFF 10.8 V IBSON Band output current per 1 band output circuit 40.0 mA tBSON ON the time when the band output is ON 40mA per 1 band output circuit 3circuits are pn at same time, 10 sec Pd Power dissipation Ta=75 °C 255 mW Topr Operating temperature -20 to +75 °C Tstg Storage temperature -40 to +125 °C |
Similar Part No. - M64898GP |
|
Similar Description - M64898GP |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |